Lines Matching full:enum

33 enum smu_event_type {
49 enum amd_dpm_forced_level {
62 enum amd_pm_state_type {
85 enum amd_vce_level {
94 enum amd_fan_ctrl_mode {
100 enum pp_clock_type {
124 enum amd_pp_sensors {
155 enum amd_pp_task {
163 enum PP_SMC_POWER_PROFILE {
181 enum {
188 enum PP_OD_DPM_TABLE_COMMAND {
208 enum PP_HWMON_TEMP {
215 enum pp_mp1_state {
222 enum pp_df_cstate {
236  * :c:type:`enum pp_power_type <pp_power_type>`.
240  * enum pp_power_limit_level - Used to query the power limits
247 enum pp_power_limit_level
256  * enum pp_power_type - Used to specify the type of the requested power
263 enum pp_power_type
269 enum pp_xgmi_plpd_mode {
324 enum amd_pp_clock_type;
354 	int (*force_clock_level)(void *handle, enum pp_clock_type type, uint32_t mask);
355 	int (*print_clock_levels)(void *handle, enum pp_clock_type type, char *buf);
356 	int (*emit_clock_levels)(void *handle, enum pp_clock_type type, char *buf, int *offset);
357 	int (*force_performance_level)(void *handle, enum amd_dpm_forced_level level);
365 	enum amd_dpm_forced_level (*get_performance_level)(void *handle);
366 	enum amd_pm_state_type (*get_current_power_state)(void *handle);
373 	int (*switch_power_profile)(void *handle, enum PP_SMC_POWER_PROFILE type, bool en);
376 	int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,
377 			enum amd_pm_state_type *user_state);
385 			enum pp_power_limit_level pp_limit_level,
386 			enum pp_power_type power_type);
390 	int (*odn_edit_dpm_table)(void *handle, enum PP_OD_DPM_TABLE_COMMAND type,
392 	int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state);
405 		enum amd_pp_clock_type type,
408 		enum amd_pp_clock_type type,
411 		enum amd_pp_clock_type type,
432 	int (*set_df_cstate)(void *handle, enum pp_df_cstate state);