Lines Matching defs:dc_debug_options
811 struct dc_debug_options { struct
812 bool native422_support;
813 bool disable_dsc;
814 enum visual_confirm visual_confirm;
815 int visual_confirm_rect_height;
817 bool sanity_checks;
818 bool max_disp_clk;
819 bool surface_trace;
820 bool timing_trace;
821 bool clock_trace;
822 bool validation_trace;
823 bool bandwidth_calcs_trace;
824 int max_downscale_src_width;
827 bool disable_stutter;
828 bool use_max_lb;
829 enum dcc_option disable_dcc;
835 enum pipe_split_policy pipe_split_policy;
836 bool force_single_disp_pipe_split;
837 bool voltage_align_fclk;
838 bool disable_min_fclk;
840 bool disable_dfs_bypass;
841 bool disable_dpp_power_gate;
842 bool disable_hubp_power_gate;
843 bool disable_dsc_power_gate;
844 bool disable_optc_power_gate;
845 bool disable_hpo_power_gate;
846 int dsc_min_slice_height_override;
847 int dsc_bpp_increment_div;
848 bool disable_pplib_wm_range;
849 enum wm_report_mode pplib_wm_report_mode;
850 unsigned int min_disp_clk_khz;
851 unsigned int min_dpp_clk_khz;
852 unsigned int min_dram_clk_khz;
853 int sr_exit_time_dpm0_ns;
854 int sr_enter_plus_exit_time_dpm0_ns;
855 int sr_exit_time_ns;
856 int sr_enter_plus_exit_time_ns;
857 int sr_exit_z8_time_ns;
858 int sr_enter_plus_exit_z8_time_ns;
859 int urgent_latency_ns;
860 uint32_t underflow_assert_delay_us;
861 int percent_of_ideal_drambw;
862 int dram_clock_change_latency_ns;
863 bool optimized_watermark;
864 int always_scale;
865 bool disable_pplib_clock_request;
866 bool disable_clock_gate;
867 bool disable_mem_low_power;
868 bool pstate_enabled;
869 bool disable_dmcu;
870 bool force_abm_enable;
871 bool disable_stereo_support;
872 bool vsr_support;
873 bool performance_trace;
874 bool az_endpoint_mute_only;
875 bool always_use_regamma;
876 bool recovery_enabled;
877 bool avoid_vbios_exec_table;
878 bool scl_reset_length10;
879 bool hdmi20_disable;
880 bool skip_detection_link_training;
881 uint32_t edid_read_retry_times;
882 unsigned int force_odm_combine; //bit vector based on otg inst
883 unsigned int seamless_boot_odm_combine;
884 unsigned int force_odm_combine_4to1; //bit vector based on otg inst
885 int minimum_z8_residency_time;
886 int minimum_z10_residency_time;
887 bool disable_z9_mpc;
888 unsigned int force_fclk_khz;
889 bool enable_tri_buf;
890 bool dmub_offload_enabled;
891 bool dmcub_emulation;
892 bool disable_idle_power_optimizations;
893 unsigned int mall_size_override;
894 unsigned int mall_additional_timer_percent;
895 bool mall_error_as_fatal;
896 bool dmub_command_table; /* for testing only */
897 struct dc_bw_validation_profile bw_val_profile;
898 bool disable_fec;
899 bool disable_48mhz_pwrdwn;
903 unsigned int force_min_dcfclk_mhz;
904 int dwb_fi_phase;
905 bool disable_timing_sync;
906 bool cm_in_bypass;
907 int force_clock_mode;/*every mode change.*/
909 bool disable_dram_clock_change_vactive_support;
910 bool validate_dml_output;
911 bool enable_dmcub_surface_flip;
912 bool usbc_combo_phy_reset_wa;
913 bool enable_dram_clock_change_one_display_vactive;
915 bool legacy_dp2_lt;
916 bool set_mst_en_for_sst;
917 bool disable_uhbr;
918 bool force_dp2_lt_fallback_method;
919 bool ignore_cable_id;
920 union mem_low_power_enable_options enable_mem_low_power;
921 union root_clock_optimization_options root_clock_optimization;
922 union fine_grain_clock_gating_enable_options enable_fine_grain_clock_gating;
923 bool hpo_optimization;
924 bool force_vblank_alignment;
927 bool enable_dmub_aux_for_legacy_ddc;
928 bool disable_fams;
929 bool disable_fams_gaming;
931 uint8_t fec_enable_delay_in100us;
932 bool enable_driver_sequence_debug;
933 enum det_size crb_alloc_policy;
934 int crb_alloc_policy_min_disp_count;
935 bool disable_z10;
936 bool enable_z9_disable_interface;
937 bool psr_skip_crtc_disable;
938 union dpia_debug_options dpia_debug;
939 bool disable_fixed_vs_aux_timeout_wa;
940 uint32_t fixed_vs_aux_delay_config_wa;
941 bool force_disable_subvp;
942 bool force_subvp_mclk_switch;
943 bool allow_sw_cursor_fallback;
944 unsigned int force_subvp_num_ways;
945 unsigned int force_mall_ss_num_ways;
946 bool alloc_extra_way_for_cursor;
947 uint32_t subvp_extra_lines;
948 bool force_usr_allow;
950 bool disable_dtb_ref_clk_switch;
951 bool extended_blank_optimization;
952 union aux_wake_wa_options aux_wake_wa;
953 uint32_t mst_start_top_delay;
954 uint8_t psr_power_use_phy_fsm;
955 enum dml_hostvm_override_opts dml_hostvm_override;
956 bool dml_disallow_alternate_prefetch_modes;
957 bool use_legacy_soc_bb_mechanism;
958 bool exit_idle_opt_for_cursor_updates;
959 bool using_dml2;
960 bool enable_single_display_2to1_odm_policy;
961 bool enable_double_buffered_dsc_pg_support;
962 bool enable_dp_dig_pixel_rate_div_policy;
963 enum lttpr_mode lttpr_mode_override;
964 unsigned int dsc_delay_factor_wa_x1000;
965 unsigned int min_prefetch_in_strobe_ns;
966 bool disable_unbounded_requesting;
967 bool dig_fifo_off_in_blank;
968 bool override_dispclk_programming;
969 bool otg_crc_db;
970 bool disallow_dispclk_dppclk_ds;
971 bool disable_fpo_optimizations;
972 bool support_eDP1_5;
973 uint32_t fpo_vactive_margin_us;
974 bool disable_fpo_vactive;
975 bool disable_boot_optimizations;
976 bool override_odm_optimization;
977 bool minimize_dispclk_using_odm;
978 bool disable_subvp_high_refresh;
979 bool disable_dp_plus_plus_wa;
980 uint32_t fpo_vactive_min_active_margin_us;
981 uint32_t fpo_vactive_max_blank_us;
1005 struct dc_debug_options debug; argument