Lines Matching full:sdma
208 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v5_2_ring_insert_nop() local
212 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v5_2_ring_insert_nop()
367 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_gfx_stop()
426 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_ctx_switch_enable()
465 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_enable()
493 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_gfx_resume()
494 ring = &adev->sdma.instance[i].ring; in sdma_v5_2_gfx_resume()
645 * sdma_v5_2_load_microcode - load the sDMA ME ucode
662 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_load_microcode()
663 if (!adev->sdma.instance[i].fw) in sdma_v5_2_load_microcode()
666 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v5_2_load_microcode()
671 (adev->sdma.instance[i].fw->data + in sdma_v5_2_load_microcode()
682 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), adev->sdma.instance[i].fw_version); in sdma_v5_2_load_microcode()
695 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_soft_reset()
753 /* enable sdma ring preemption */ in sdma_v5_2_start()
988 * Update PTEs by copying them from the GART using sDMA.
1016 * Update PTEs by writing them manually using sDMA.
1037 * sdma_v5_2_vm_set_pte_pde - update the page tables using sDMA
1046 * Update the page tables using sDMA.
1076 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v5_2_ring_pad_ib() local
1082 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v5_2_ring_pad_ib()
1119 * sdma_v5_2_ring_emit_vm_flush - vm flush using sDMA
1126 * using sDMA.
1225 /* SDMA trap event */ in sdma_v5_2_sw_init()
1226 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_sw_init()
1229 &adev->sdma.trap_irq); in sdma_v5_2_sw_init()
1234 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_sw_init()
1235 ring = &adev->sdma.instance[i].ring; in sdma_v5_2_sw_init()
1247 sprintf(ring->name, "sdma%d", i); in sdma_v5_2_sw_init()
1248 r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, in sdma_v5_2_sw_init()
1263 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v5_2_sw_fini()
1264 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v5_2_sw_fini()
1310 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_is_idle()
1408 DRM_DEBUG("IH: SDMA trap\n"); in sdma_v5_2_process_trap_irq()
1429 amdgpu_fence_process(&adev->sdma.instance[0].ring); in sdma_v5_2_process_trap_irq()
1445 amdgpu_fence_process(&adev->sdma.instance[1].ring); in sdma_v5_2_process_trap_irq()
1461 amdgpu_fence_process(&adev->sdma.instance[2].ring); in sdma_v5_2_process_trap_irq()
1477 amdgpu_fence_process(&adev->sdma.instance[3].ring); in sdma_v5_2_process_trap_irq()
1506 if (adev->sdma.instance[i].fw_version < 70) in sdma_v5_2_firmware_mgcg_support()
1510 if (adev->sdma.instance[i].fw_version < 47) in sdma_v5_2_firmware_mgcg_support()
1514 if (adev->sdma.instance[i].fw_version < 9) in sdma_v5_2_firmware_mgcg_support()
1531 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_update_medium_grain_clock_gating()
1537 /* Enable sdma clock gating */ in sdma_v5_2_update_medium_grain_clock_gating()
1548 /* Disable sdma clock gating */ in sdma_v5_2_update_medium_grain_clock_gating()
1568 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_update_medium_grain_light_sleep()
1569 if (adev->sdma.instance[i].fw_version < 70 && in sdma_v5_2_update_medium_grain_light_sleep()
1575 /* Enable sdma mem light sleep */ in sdma_v5_2_update_medium_grain_light_sleep()
1582 /* Disable sdma mem light sleep */ in sdma_v5_2_update_medium_grain_light_sleep()
1650 /* SDMA 5.2.3 (RMB) FW doesn't seem to properly in sdma_v5_2_ring_begin_use()
1652 * hangs in SDMA. Disallow GFXOFF while SDMA is active. in sdma_v5_2_ring_begin_use()
1655 * this GFXOFF will be disallowed anyway when SDMA is in sdma_v5_2_ring_begin_use()
1665 /* SDMA 5.2.3 (RMB) FW doesn't seem to properly in sdma_v5_2_ring_end_use()
1667 * hangs in SDMA. Allow GFXOFF when SDMA is complete. in sdma_v5_2_ring_end_use()
1733 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_set_ring_funcs()
1734 adev->sdma.instance[i].ring.funcs = &sdma_v5_2_ring_funcs; in sdma_v5_2_set_ring_funcs()
1735 adev->sdma.instance[i].ring.me = i; in sdma_v5_2_set_ring_funcs()
1750 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE0 + in sdma_v5_2_set_irq_funcs()
1751 adev->sdma.num_instances; in sdma_v5_2_set_irq_funcs()
1752 adev->sdma.trap_irq.funcs = &sdma_v5_2_trap_irq_funcs; in sdma_v5_2_set_irq_funcs()
1753 adev->sdma.illegal_inst_irq.funcs = &sdma_v5_2_illegal_inst_irq_funcs; in sdma_v5_2_set_irq_funcs()
1757 * sdma_v5_2_emit_copy_buffer - copy buffer using the sDMA engine
1787 * sdma_v5_2_emit_fill_buffer - fill buffer using the sDMA engine
1822 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v5_2_set_buffer_funcs()
1839 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_set_vm_pte_funcs()
1841 &adev->sdma.instance[i].ring.sched; in sdma_v5_2_set_vm_pte_funcs()
1843 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v5_2_set_vm_pte_funcs()