Lines Matching full:sdma
555 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_setup_ulv()
580 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()
586 for every SDMA instance */ in sdma_v4_0_init_microcode()
739 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_0_ring_insert_nop() local
743 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_0_ring_insert_nop()
872 * @enable: enable SDMA RB/IB
880 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_enable()
914 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_page_stop()
963 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_ctx_switch_enable()
975 * Enable SDMA utilization. Its only supported on in sdma_v4_0_ctx_switch_enable()
981 adev->sdma.instance[i].fw_version >= 14) in sdma_v4_0_ctx_switch_enable()
1005 if (adev->sdma.has_page_queue) in sdma_v4_0_enable()
1009 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_enable()
1044 struct amdgpu_ring *ring = &adev->sdma.instance[i].ring; in sdma_v4_0_gfx_resume()
1129 struct amdgpu_ring *ring = &adev->sdma.instance[i].page; in sdma_v4_0_page_resume()
1285 * sdma_v4_0_load_microcode - load the sDMA ME ucode
1302 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_load_microcode()
1303 if (!adev->sdma.instance[i].fw) in sdma_v4_0_load_microcode()
1306 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v4_0_load_microcode()
1311 (adev->sdma.instance[i].fw->data + in sdma_v4_0_load_microcode()
1321 adev->sdma.instance[i].fw_version); in sdma_v4_0_load_microcode()
1353 /* enable sdma ring preemption */ in sdma_v4_0_start()
1358 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1363 if (adev->sdma.has_page_queue) in sdma_v4_0_start()
1388 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1389 ring = &adev->sdma.instance[i].ring; in sdma_v4_0_start()
1395 if (adev->sdma.has_page_queue) { in sdma_v4_0_start()
1396 struct amdgpu_ring *page = &adev->sdma.instance[i].page; in sdma_v4_0_start()
1537 * Update PTEs by copying them from the GART using sDMA (VEGA10).
1565 * Update PTEs by writing them manually using sDMA (VEGA10).
1586 * sdma_v4_0_vm_set_pte_pde - update the page tables using sDMA
1595 * Update the page tables using sDMA (VEGA10).
1623 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_0_ring_pad_ib() local
1629 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_0_ring_pad_ib()
1660 * sdma_v4_0_ring_emit_vm_flush - vm flush using sDMA
1667 * using sDMA (VEGA10).
1692 uint fw_version = adev->sdma.instance[0].fw_version; in sdma_v4_0_fw_support_paging_queue()
1719 adev->sdma.has_page_queue = false; in sdma_v4_0_early_init()
1721 adev->sdma.has_page_queue = true; in sdma_v4_0_early_init()
1754 /* SDMA trap event */ in sdma_v4_0_sw_init()
1755 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1758 &adev->sdma.trap_irq); in sdma_v4_0_sw_init()
1763 /* SDMA SRAM ECC event */ in sdma_v4_0_sw_init()
1764 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1767 &adev->sdma.ecc_irq); in sdma_v4_0_sw_init()
1772 /* SDMA VM_HOLE/DOORBELL_INV/POLL_TIMEOUT/SRBM_WRITE_PROTECTION event*/ in sdma_v4_0_sw_init()
1773 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1776 &adev->sdma.vm_hole_irq); in sdma_v4_0_sw_init()
1782 &adev->sdma.doorbell_invalid_irq); in sdma_v4_0_sw_init()
1788 &adev->sdma.pool_timeout_irq); in sdma_v4_0_sw_init()
1794 &adev->sdma.srbm_write_irq); in sdma_v4_0_sw_init()
1799 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1800 ring = &adev->sdma.instance[i].ring; in sdma_v4_0_sw_init()
1804 DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i, in sdma_v4_0_sw_init()
1811 * On Arcturus, SDMA instance 5~7 has a different vmhub in sdma_v4_0_sw_init()
1821 sprintf(ring->name, "sdma%d", i); in sdma_v4_0_sw_init()
1822 r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, in sdma_v4_0_sw_init()
1828 if (adev->sdma.has_page_queue) { in sdma_v4_0_sw_init()
1829 ring = &adev->sdma.instance[i].page; in sdma_v4_0_sw_init()
1860 &adev->sdma.trap_irq, in sdma_v4_0_sw_init()
1869 dev_err(adev->dev, "Failed to initialize sdma ras block!\n"); in sdma_v4_0_sw_init()
1881 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_fini()
1882 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v4_0_sw_fini()
1883 if (adev->sdma.has_page_queue) in sdma_v4_0_sw_fini()
1884 amdgpu_ring_fini(&adev->sdma.instance[i].page); in sdma_v4_0_sw_fini()
1918 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_hw_fini()
1919 amdgpu_irq_put(adev, &adev->sdma.ecc_irq, in sdma_v4_0_hw_fini()
1937 /* SMU saves SDMA state for us */ in sdma_v4_0_suspend()
1950 /* SMU restores SDMA state for us */ in sdma_v4_0_resume()
1965 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_is_idle()
1978 u32 sdma[AMDGPU_MAX_SDMA_INSTANCES]; in sdma_v4_0_wait_for_idle() local
1982 for (j = 0; j < adev->sdma.num_instances; j++) { in sdma_v4_0_wait_for_idle()
1983 sdma[j] = RREG32_SDMA(j, mmSDMA0_STATUS_REG); in sdma_v4_0_wait_for_idle()
1984 if (!(sdma[j] & SDMA0_STATUS_REG__IDLE_MASK)) in sdma_v4_0_wait_for_idle()
1987 if (j == adev->sdma.num_instances) in sdma_v4_0_wait_for_idle()
2022 DRM_DEBUG("IH: SDMA trap\n"); in sdma_v4_0_process_trap_irq()
2026 amdgpu_fence_process(&adev->sdma.instance[instance].ring); in sdma_v4_0_process_trap_irq()
2031 amdgpu_fence_process(&adev->sdma.instance[instance].page); in sdma_v4_0_process_trap_irq()
2039 amdgpu_fence_process(&adev->sdma.instance[instance].page); in sdma_v4_0_process_trap_irq()
2074 DRM_ERROR("Illegal instruction in SDMA command stream\n"); in sdma_v4_0_process_illegal_inst_irq()
2082 drm_sched_fault(&adev->sdma.instance[instance].ring.sched); in sdma_v4_0_process_illegal_inst_irq()
2111 if (instance < 0 || instance >= adev->sdma.num_instances) { in sdma_v4_0_print_iv_entry()
2112 dev_err(adev->dev, "sdma instance invalid %d\n", instance); in sdma_v4_0_print_iv_entry()
2123 "[sdma%d] address:0x%016llx src_id:%u ring:%u vmid:%u " in sdma_v4_0_print_iv_entry()
2144 dev_dbg_ratelimited(adev->dev, "SDMA received a doorbell from BIF with byte_enable !=0xff\n"); in sdma_v4_0_process_doorbell_invalid_irq()
2164 "SDMA gets an Register Write SRBM_WRITE command in non-privilege command buffer\n"); in sdma_v4_0_process_srbm_write_irq()
2177 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_clock_gating()
2191 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_clock_gating()
2216 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_light_sleep()
2217 /* 1-not override: enable sdma mem light sleep */ in sdma_v4_0_update_medium_grain_light_sleep()
2224 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_light_sleep()
2225 /* 0-override:disable sdma mem light sleep */ in sdma_v4_0_update_medium_grain_light_sleep()
2373 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_set_ring_funcs()
2374 adev->sdma.instance[i].ring.funcs = &sdma_v4_0_ring_funcs; in sdma_v4_0_set_ring_funcs()
2375 adev->sdma.instance[i].ring.me = i; in sdma_v4_0_set_ring_funcs()
2376 if (adev->sdma.has_page_queue) { in sdma_v4_0_set_ring_funcs()
2377 adev->sdma.instance[i].page.funcs = in sdma_v4_0_set_ring_funcs()
2379 adev->sdma.instance[i].page.me = i; in sdma_v4_0_set_ring_funcs()
2416 adev->sdma.trap_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2417 adev->sdma.ecc_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2419 switch (adev->sdma.num_instances) { in sdma_v4_0_set_irq_funcs()
2422 adev->sdma.vm_hole_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2423 adev->sdma.doorbell_invalid_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2424 adev->sdma.pool_timeout_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2425 adev->sdma.srbm_write_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2430 adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs; in sdma_v4_0_set_irq_funcs()
2431 adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs; in sdma_v4_0_set_irq_funcs()
2432 adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs; in sdma_v4_0_set_irq_funcs()
2433 adev->sdma.vm_hole_irq.funcs = &sdma_v4_0_vm_hole_irq_funcs; in sdma_v4_0_set_irq_funcs()
2434 adev->sdma.doorbell_invalid_irq.funcs = &sdma_v4_0_doorbell_invalid_irq_funcs; in sdma_v4_0_set_irq_funcs()
2435 adev->sdma.pool_timeout_irq.funcs = &sdma_v4_0_pool_timeout_irq_funcs; in sdma_v4_0_set_irq_funcs()
2436 adev->sdma.srbm_write_irq.funcs = &sdma_v4_0_srbm_write_irq_funcs; in sdma_v4_0_set_irq_funcs()
2440 * sdma_v4_0_emit_copy_buffer - copy buffer using the sDMA engine
2470 * sdma_v4_0_emit_fill_buffer - fill buffer using the sDMA engine
2504 if (adev->sdma.has_page_queue) in sdma_v4_0_set_buffer_funcs()
2505 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].page; in sdma_v4_0_set_buffer_funcs()
2507 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v4_0_set_buffer_funcs()
2524 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_set_vm_pte_funcs()
2525 if (adev->sdma.has_page_queue) in sdma_v4_0_set_vm_pte_funcs()
2526 sched = &adev->sdma.instance[i].page.sched; in sdma_v4_0_set_vm_pte_funcs()
2528 sched = &adev->sdma.instance[i].ring.sched; in sdma_v4_0_set_vm_pte_funcs()
2531 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v4_0_set_vm_pte_funcs()
2543 /* the SDMA_EDC_COUNTER register in each sdma instance in sdma_v4_0_get_ras_error_count()
2550 DRM_INFO("Detected %s in SDMA%d, SED %d\n", in sdma_v4_0_get_ras_error_count()
2584 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_query_ras_error_count()
2586 dev_err(adev->dev, "Query ras error count failed in SDMA%d\n", i); in sdma_v4_0_query_ras_error_count()
2598 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v4_0_reset_ras_error_count()
2620 adev->sdma.ras = &sdma_v4_0_ras; in sdma_v4_0_set_ras_funcs()
2623 adev->sdma.ras = &sdma_v4_4_ras; in sdma_v4_0_set_ras_funcs()