Lines Matching full:sdma
182 * sDMA - System DMA
190 * (ring buffer, IBs, etc.), but sDMA has it's own
192 * used by the CP. sDMA supports copying data, writing
254 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v3_0_free_microcode()
255 amdgpu_ucode_release(&adev->sdma.instance[i].fw); in sdma_v3_0_free_microcode()
306 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()
311 err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw, fw_name); in sdma_v3_0_init_microcode()
314 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v3_0_init_microcode()
315 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v3_0_init_microcode()
316 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v3_0_init_microcode()
317 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v3_0_init_microcode()
318 adev->sdma.instance[i].burst_nop = true; in sdma_v3_0_init_microcode()
322 info->fw = adev->sdma.instance[i].fw; in sdma_v3_0_init_microcode()
331 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v3_0_init_microcode()
332 amdgpu_ucode_release(&adev->sdma.instance[i].fw); in sdma_v3_0_init_microcode()
399 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v3_0_ring_insert_nop() local
403 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v3_0_ring_insert_nop()
516 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_stop()
575 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_ctx_switch_enable()
617 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_enable()
644 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()
645 ring = &adev->sdma.instance[i].ring; in sdma_v3_0_gfx_resume()
651 /* SDMA GFX */ in sdma_v3_0_gfx_resume()
739 /* enable sdma ring preemption */ in sdma_v3_0_gfx_resume()
742 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()
743 ring = &adev->sdma.instance[i].ring; in sdma_v3_0_gfx_resume()
778 /* disable sdma engine before programing it */ in sdma_v3_0_start()
921 * Update PTEs by copying them from the GART using sDMA (CIK).
948 * Update PTEs by writing them manually using sDMA (CIK).
969 * sdma_v3_0_vm_set_pte_pde - update the page tables using sDMA
978 * Update the page tables using sDMA (CIK).
1006 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v3_0_ring_pad_ib() local
1012 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v3_0_ring_pad_ib()
1047 * sdma_v3_0_ring_emit_vm_flush - cik vm flush using sDMA
1054 * using sDMA (VI).
1089 adev->sdma.num_instances = 1; in sdma_v3_0_early_init()
1092 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in sdma_v3_0_early_init()
1114 /* SDMA trap event */ in sdma_v3_0_sw_init()
1116 &adev->sdma.trap_irq); in sdma_v3_0_sw_init()
1120 /* SDMA Privileged inst */ in sdma_v3_0_sw_init()
1122 &adev->sdma.illegal_inst_irq); in sdma_v3_0_sw_init()
1126 /* SDMA Privileged inst */ in sdma_v3_0_sw_init()
1128 &adev->sdma.illegal_inst_irq); in sdma_v3_0_sw_init()
1132 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_sw_init()
1133 ring = &adev->sdma.instance[i].ring; in sdma_v3_0_sw_init()
1142 sprintf(ring->name, "sdma%d", i); in sdma_v3_0_sw_init()
1143 r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, in sdma_v3_0_sw_init()
1159 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v3_0_sw_fini()
1160 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v3_0_sw_fini()
1246 adev->sdma.srbm_soft_reset = srbm_soft_reset; in sdma_v3_0_check_soft_reset()
1249 adev->sdma.srbm_soft_reset = 0; in sdma_v3_0_check_soft_reset()
1259 if (!adev->sdma.srbm_soft_reset) in sdma_v3_0_pre_soft_reset()
1262 srbm_soft_reset = adev->sdma.srbm_soft_reset; in sdma_v3_0_pre_soft_reset()
1278 if (!adev->sdma.srbm_soft_reset) in sdma_v3_0_post_soft_reset()
1281 srbm_soft_reset = adev->sdma.srbm_soft_reset; in sdma_v3_0_post_soft_reset()
1298 if (!adev->sdma.srbm_soft_reset) in sdma_v3_0_soft_reset()
1301 srbm_soft_reset = adev->sdma.srbm_soft_reset; in sdma_v3_0_soft_reset()
1377 DRM_DEBUG("IH: SDMA trap\n"); in sdma_v3_0_process_trap_irq()
1382 amdgpu_fence_process(&adev->sdma.instance[0].ring); in sdma_v3_0_process_trap_irq()
1395 amdgpu_fence_process(&adev->sdma.instance[1].ring); in sdma_v3_0_process_trap_irq()
1415 DRM_ERROR("Illegal instruction in SDMA command stream\n"); in sdma_v3_0_process_illegal_inst_irq()
1420 drm_sched_fault(&adev->sdma.instance[instance_id].ring.sched); in sdma_v3_0_process_illegal_inst_irq()
1432 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_update_sdma_medium_grain_clock_gating()
1446 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_update_sdma_medium_grain_clock_gating()
1471 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1479 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1590 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_set_ring_funcs()
1591 adev->sdma.instance[i].ring.funcs = &sdma_v3_0_ring_funcs; in sdma_v3_0_set_ring_funcs()
1592 adev->sdma.instance[i].ring.me = i; in sdma_v3_0_set_ring_funcs()
1607 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; in sdma_v3_0_set_irq_funcs()
1608 adev->sdma.trap_irq.funcs = &sdma_v3_0_trap_irq_funcs; in sdma_v3_0_set_irq_funcs()
1609 adev->sdma.illegal_inst_irq.funcs = &sdma_v3_0_illegal_inst_irq_funcs; in sdma_v3_0_set_irq_funcs()
1613 * sdma_v3_0_emit_copy_buffer - copy buffer using the sDMA engine
1642 * sdma_v3_0_emit_fill_buffer - fill buffer using the sDMA engine
1676 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v3_0_set_buffer_funcs()
1692 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_set_vm_pte_funcs()
1694 &adev->sdma.instance[i].ring.sched; in sdma_v3_0_set_vm_pte_funcs()
1696 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v3_0_set_vm_pte_funcs()