Lines Matching +full:gfx +full:- +full:mem
57 if (gpu_instance->adev == adev) { in amdgpu_unregister_gpu_instance()
59 mgpu_info.gpu_ins[mgpu_info.num_gpu - 1]; in amdgpu_unregister_gpu_instance()
60 mgpu_info.num_gpu--; in amdgpu_unregister_gpu_instance()
61 if (adev->flags & AMD_IS_APU) in amdgpu_unregister_gpu_instance()
62 mgpu_info.num_apu--; in amdgpu_unregister_gpu_instance()
64 mgpu_info.num_dgpu--; in amdgpu_unregister_gpu_instance()
73 * amdgpu_driver_unload_kms - Main unload function for KMS.
89 if (adev->rmmio == NULL) in amdgpu_driver_unload_kms()
112 gpu_instance->adev = adev; in amdgpu_register_gpu_instance()
113 gpu_instance->mgpu_fan_enabled = 0; in amdgpu_register_gpu_instance()
116 if (adev->flags & AMD_IS_APU) in amdgpu_register_gpu_instance()
125 * amdgpu_driver_load_kms - Main load function for KMS.
148 dev_err(dev->dev, "Fatal error during GPU init\n"); in amdgpu_driver_load_kms()
152 adev->pm.rpm_mode = AMDGPU_RUNPM_NONE; in amdgpu_driver_load_kms()
155 adev->pm.rpm_mode = AMDGPU_RUNPM_PX; in amdgpu_driver_load_kms()
156 dev_info(adev->dev, "Using ATPX for runtime pm\n"); in amdgpu_driver_load_kms()
159 adev->pm.rpm_mode = AMDGPU_RUNPM_BOCO; in amdgpu_driver_load_kms()
160 dev_info(adev->dev, "Using BOCO for runtime pm\n"); in amdgpu_driver_load_kms()
163 switch (adev->asic_type) { in amdgpu_driver_load_kms()
168 adev->pm.rpm_mode = AMDGPU_RUNPM_BACO; in amdgpu_driver_load_kms()
172 if (!adev->gmc.noretry) in amdgpu_driver_load_kms()
173 adev->pm.rpm_mode = AMDGPU_RUNPM_BACO; in amdgpu_driver_load_kms()
177 adev->pm.rpm_mode = AMDGPU_RUNPM_BACO; in amdgpu_driver_load_kms()
181 if (adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) in amdgpu_driver_load_kms()
182 dev_info(adev->dev, "Using BACO for runtime pm\n"); in amdgpu_driver_load_kms()
191 dev_dbg(dev->dev, "Error during ACPI methods call\n"); in amdgpu_driver_load_kms()
245 switch (query_fw->fw_type) { in amdgpu_firmware_info()
247 fw_info->ver = adev->vce.fw_version; in amdgpu_firmware_info()
248 fw_info->feature = adev->vce.fb_version; in amdgpu_firmware_info()
251 fw_info->ver = adev->uvd.fw_version; in amdgpu_firmware_info()
252 fw_info->feature = 0; in amdgpu_firmware_info()
255 fw_info->ver = adev->vcn.fw_version; in amdgpu_firmware_info()
256 fw_info->feature = 0; in amdgpu_firmware_info()
259 fw_info->ver = adev->gmc.fw_version; in amdgpu_firmware_info()
260 fw_info->feature = 0; in amdgpu_firmware_info()
263 fw_info->ver = adev->gfx.me_fw_version; in amdgpu_firmware_info()
264 fw_info->feature = adev->gfx.me_feature_version; in amdgpu_firmware_info()
267 fw_info->ver = adev->gfx.pfp_fw_version; in amdgpu_firmware_info()
268 fw_info->feature = adev->gfx.pfp_feature_version; in amdgpu_firmware_info()
271 fw_info->ver = adev->gfx.ce_fw_version; in amdgpu_firmware_info()
272 fw_info->feature = adev->gfx.ce_feature_version; in amdgpu_firmware_info()
275 fw_info->ver = adev->gfx.rlc_fw_version; in amdgpu_firmware_info()
276 fw_info->feature = adev->gfx.rlc_feature_version; in amdgpu_firmware_info()
279 fw_info->ver = adev->gfx.rlc_srlc_fw_version; in amdgpu_firmware_info()
280 fw_info->feature = adev->gfx.rlc_srlc_feature_version; in amdgpu_firmware_info()
283 fw_info->ver = adev->gfx.rlc_srlg_fw_version; in amdgpu_firmware_info()
284 fw_info->feature = adev->gfx.rlc_srlg_feature_version; in amdgpu_firmware_info()
287 fw_info->ver = adev->gfx.rlc_srls_fw_version; in amdgpu_firmware_info()
288 fw_info->feature = adev->gfx.rlc_srls_feature_version; in amdgpu_firmware_info()
291 fw_info->ver = adev->gfx.rlcp_ucode_version; in amdgpu_firmware_info()
292 fw_info->feature = adev->gfx.rlcp_ucode_feature_version; in amdgpu_firmware_info()
295 fw_info->ver = adev->gfx.rlcv_ucode_version; in amdgpu_firmware_info()
296 fw_info->feature = adev->gfx.rlcv_ucode_feature_version; in amdgpu_firmware_info()
299 if (query_fw->index == 0) { in amdgpu_firmware_info()
300 fw_info->ver = adev->gfx.mec_fw_version; in amdgpu_firmware_info()
301 fw_info->feature = adev->gfx.mec_feature_version; in amdgpu_firmware_info()
302 } else if (query_fw->index == 1) { in amdgpu_firmware_info()
303 fw_info->ver = adev->gfx.mec2_fw_version; in amdgpu_firmware_info()
304 fw_info->feature = adev->gfx.mec2_feature_version; in amdgpu_firmware_info()
306 return -EINVAL; in amdgpu_firmware_info()
309 fw_info->ver = adev->pm.fw_version; in amdgpu_firmware_info()
310 fw_info->feature = 0; in amdgpu_firmware_info()
313 switch (query_fw->index) { in amdgpu_firmware_info()
315 fw_info->ver = adev->psp.xgmi_context.context.bin_desc.fw_version; in amdgpu_firmware_info()
316 fw_info->feature = adev->psp.xgmi_context.context in amdgpu_firmware_info()
320 fw_info->ver = adev->psp.ras_context.context.bin_desc.fw_version; in amdgpu_firmware_info()
321 fw_info->feature = adev->psp.ras_context.context in amdgpu_firmware_info()
325 fw_info->ver = adev->psp.hdcp_context.context.bin_desc.fw_version; in amdgpu_firmware_info()
326 fw_info->feature = adev->psp.hdcp_context.context in amdgpu_firmware_info()
330 fw_info->ver = adev->psp.dtm_context.context.bin_desc.fw_version; in amdgpu_firmware_info()
331 fw_info->feature = adev->psp.dtm_context.context in amdgpu_firmware_info()
335 fw_info->ver = adev->psp.rap_context.context.bin_desc.fw_version; in amdgpu_firmware_info()
336 fw_info->feature = adev->psp.rap_context.context in amdgpu_firmware_info()
340 fw_info->ver = adev->psp.securedisplay_context.context.bin_desc.fw_version; in amdgpu_firmware_info()
341 fw_info->feature = in amdgpu_firmware_info()
342 adev->psp.securedisplay_context.context.bin_desc in amdgpu_firmware_info()
346 return -EINVAL; in amdgpu_firmware_info()
350 if (query_fw->index >= adev->sdma.num_instances) in amdgpu_firmware_info()
351 return -EINVAL; in amdgpu_firmware_info()
352 fw_info->ver = adev->sdma.instance[query_fw->index].fw_version; in amdgpu_firmware_info()
353 fw_info->feature = adev->sdma.instance[query_fw->index].feature_version; in amdgpu_firmware_info()
356 fw_info->ver = adev->psp.sos.fw_version; in amdgpu_firmware_info()
357 fw_info->feature = adev->psp.sos.feature_version; in amdgpu_firmware_info()
360 fw_info->ver = adev->psp.asd_context.bin_desc.fw_version; in amdgpu_firmware_info()
361 fw_info->feature = adev->psp.asd_context.bin_desc.feature_version; in amdgpu_firmware_info()
364 fw_info->ver = adev->dm.dmcu_fw_version; in amdgpu_firmware_info()
365 fw_info->feature = 0; in amdgpu_firmware_info()
368 fw_info->ver = adev->dm.dmcub_fw_version; in amdgpu_firmware_info()
369 fw_info->feature = 0; in amdgpu_firmware_info()
372 fw_info->ver = adev->psp.toc.fw_version; in amdgpu_firmware_info()
373 fw_info->feature = adev->psp.toc.feature_version; in amdgpu_firmware_info()
376 fw_info->ver = adev->psp.cap_fw_version; in amdgpu_firmware_info()
377 fw_info->feature = adev->psp.cap_feature_version; in amdgpu_firmware_info()
380 fw_info->ver = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
381 fw_info->feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
385 fw_info->ver = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
386 fw_info->feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
390 fw_info->ver = adev->gfx.imu_fw_version; in amdgpu_firmware_info()
391 fw_info->feature = 0; in amdgpu_firmware_info()
394 fw_info->ver = adev->vpe.fw_version; in amdgpu_firmware_info()
395 fw_info->feature = adev->vpe.feature_version; in amdgpu_firmware_info()
398 return -EINVAL; in amdgpu_firmware_info()
413 if (info->query_hw_ip.ip_instance >= AMDGPU_HW_IP_INSTANCE_MAX_COUNT) in amdgpu_hw_ip_info()
414 return -EINVAL; in amdgpu_hw_ip_info()
416 switch (info->query_hw_ip.type) { in amdgpu_hw_ip_info()
419 for (i = 0; i < adev->gfx.num_gfx_rings; i++) in amdgpu_hw_ip_info()
420 if (adev->gfx.gfx_ring[i].sched.ready) in amdgpu_hw_ip_info()
427 for (i = 0; i < adev->gfx.num_compute_rings; i++) in amdgpu_hw_ip_info()
428 if (adev->gfx.compute_ring[i].sched.ready) in amdgpu_hw_ip_info()
435 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_hw_ip_info()
436 if (adev->sdma.instance[i].ring.sched.ready) in amdgpu_hw_ip_info()
443 for (i = 0; i < adev->uvd.num_uvd_inst; i++) { in amdgpu_hw_ip_info()
444 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_hw_ip_info()
447 if (adev->uvd.inst[i].ring.sched.ready) in amdgpu_hw_ip_info()
455 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_hw_ip_info()
456 if (adev->vce.ring[i].sched.ready) in amdgpu_hw_ip_info()
463 for (i = 0; i < adev->uvd.num_uvd_inst; i++) { in amdgpu_hw_ip_info()
464 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_hw_ip_info()
467 for (j = 0; j < adev->uvd.num_enc_rings; j++) in amdgpu_hw_ip_info()
468 if (adev->uvd.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()
476 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in amdgpu_hw_ip_info()
477 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_hw_ip_info()
480 if (adev->vcn.inst[i].ring_dec.sched.ready) in amdgpu_hw_ip_info()
488 for (i = 0; i < adev->vcn.num_vcn_inst; i++) { in amdgpu_hw_ip_info()
489 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_hw_ip_info()
492 for (j = 0; j < adev->vcn.num_enc_rings; j++) in amdgpu_hw_ip_info()
493 if (adev->vcn.inst[i].ring_enc[j].sched.ready) in amdgpu_hw_ip_info()
503 for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) { in amdgpu_hw_ip_info()
504 if (adev->jpeg.harvest_config & (1 << i)) in amdgpu_hw_ip_info()
507 for (j = 0; j < adev->jpeg.num_jpeg_rings; j++) in amdgpu_hw_ip_info()
508 if (adev->jpeg.inst[i].ring_dec[j].sched.ready) in amdgpu_hw_ip_info()
516 if (adev->vpe.ring.sched.ready) in amdgpu_hw_ip_info()
522 return -EINVAL; in amdgpu_hw_ip_info()
525 for (i = 0; i < adev->num_ip_blocks; i++) in amdgpu_hw_ip_info()
526 if (adev->ip_blocks[i].version->type == type && in amdgpu_hw_ip_info()
527 adev->ip_blocks[i].status.valid) in amdgpu_hw_ip_info()
530 if (i == adev->num_ip_blocks) in amdgpu_hw_ip_info()
533 num_rings = min(amdgpu_ctx_num_entities[info->query_hw_ip.type], in amdgpu_hw_ip_info()
536 result->hw_ip_version_major = adev->ip_blocks[i].version->major; in amdgpu_hw_ip_info()
537 result->hw_ip_version_minor = adev->ip_blocks[i].version->minor; in amdgpu_hw_ip_info()
539 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_hw_ip_info()
542 result->ip_discovery_version = in amdgpu_hw_ip_info()
546 result->ip_discovery_version = in amdgpu_hw_ip_info()
552 result->ip_discovery_version = in amdgpu_hw_ip_info()
556 result->ip_discovery_version = in amdgpu_hw_ip_info()
560 result->ip_discovery_version = in amdgpu_hw_ip_info()
564 result->ip_discovery_version = 0; in amdgpu_hw_ip_info()
568 result->ip_discovery_version = 0; in amdgpu_hw_ip_info()
570 result->capabilities_flags = 0; in amdgpu_hw_ip_info()
571 result->available_rings = (1 << num_rings) - 1; in amdgpu_hw_ip_info()
572 result->ib_start_alignment = ib_start_alignment; in amdgpu_hw_ip_info()
573 result->ib_size_alignment = ib_size_alignment; in amdgpu_hw_ip_info()
581 * amdgpu_info_ioctl - answer a device specific request.
590 * Returns 0 on success, -EINVAL on failure.
596 struct amdgpu_mode_info *minfo = &adev->mode_info; in amdgpu_info_ioctl()
597 void __user *out = (void __user *)(uintptr_t)info->return_pointer; in amdgpu_info_ioctl()
603 uint32_t size = info->return_size; in amdgpu_info_ioctl()
610 if (!info->return_size || !info->return_pointer) in amdgpu_info_ioctl()
611 return -EINVAL; in amdgpu_info_ioctl()
613 switch (info->query) { in amdgpu_info_ioctl()
615 ui32 = adev->accel_working; in amdgpu_info_ioctl()
616 return copy_to_user(out, &ui32, min(size, 4u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
618 for (i = 0, found = 0; i < adev->mode_info.num_crtc; i++) { in amdgpu_info_ioctl()
619 crtc = (struct drm_crtc *)minfo->crtcs[i]; in amdgpu_info_ioctl()
620 if (crtc && crtc->base.id == info->mode_crtc.id) { in amdgpu_info_ioctl()
623 ui32 = amdgpu_crtc->crtc_id; in amdgpu_info_ioctl()
629 DRM_DEBUG_KMS("unknown crtc id %d\n", info->mode_crtc.id); in amdgpu_info_ioctl()
630 return -EINVAL; in amdgpu_info_ioctl()
632 return copy_to_user(out, &ui32, min(size, 4u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
641 return ret ? -EFAULT : 0; in amdgpu_info_ioctl()
644 fpriv = (struct amdgpu_fpriv *)filp->driver_priv; in amdgpu_info_ioctl()
645 type = amdgpu_ip_get_block_type(adev, info->query_hw_ip.type); in amdgpu_info_ioctl()
648 if (!ip_block || !ip_block->status.valid) in amdgpu_info_ioctl()
649 return -EINVAL; in amdgpu_info_ioctl()
651 if (adev->xcp_mgr && adev->xcp_mgr->num_xcps > 0 && in amdgpu_info_ioctl()
652 fpriv->xcp_id >= 0 && fpriv->xcp_id < adev->xcp_mgr->num_xcps) { in amdgpu_info_ioctl()
653 xcp = &adev->xcp_mgr->xcp[fpriv->xcp_id]; in amdgpu_info_ioctl()
665 count = hweight32(inst_mask) * adev->jpeg.num_jpeg_rings; in amdgpu_info_ioctl()
672 return -EINVAL; in amdgpu_info_ioctl()
676 return copy_to_user(out, &count, min(size, 4u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
685 count = adev->sdma.num_instances; in amdgpu_info_ioctl()
688 count = adev->jpeg.num_jpeg_inst * adev->jpeg.num_jpeg_rings; in amdgpu_info_ioctl()
691 count = adev->vcn.num_vcn_inst; in amdgpu_info_ioctl()
694 count = adev->uvd.num_uvd_inst; in amdgpu_info_ioctl()
704 return copy_to_user(out, &count, min(size, 4u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
708 return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
713 if (info->query_fw.ip_instance != 0) in amdgpu_info_ioctl()
714 return -EINVAL; in amdgpu_info_ioctl()
716 ret = amdgpu_firmware_info(&fw_info, &info->query_fw, adev); in amdgpu_info_ioctl()
721 min((size_t)size, sizeof(fw_info))) ? -EFAULT : 0; in amdgpu_info_ioctl()
724 ui64 = atomic64_read(&adev->num_bytes_moved); in amdgpu_info_ioctl()
725 return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
727 ui64 = atomic64_read(&adev->num_evictions); in amdgpu_info_ioctl()
728 return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
730 ui64 = atomic64_read(&adev->num_vram_cpu_page_faults); in amdgpu_info_ioctl()
731 return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
733 ui64 = ttm_resource_manager_usage(&adev->mman.vram_mgr.manager); in amdgpu_info_ioctl()
734 return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
736 ui64 = amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr); in amdgpu_info_ioctl()
737 return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
739 ui64 = ttm_resource_manager_usage(&adev->mman.gtt_mgr.manager); in amdgpu_info_ioctl()
740 return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
745 gds_info.compute_partition_size = adev->gds.gds_size; in amdgpu_info_ioctl()
746 gds_info.gds_total_size = adev->gds.gds_size; in amdgpu_info_ioctl()
747 gds_info.gws_per_compute_partition = adev->gds.gws_size; in amdgpu_info_ioctl()
748 gds_info.oa_per_compute_partition = adev->gds.oa_size; in amdgpu_info_ioctl()
750 min((size_t)size, sizeof(gds_info))) ? -EFAULT : 0; in amdgpu_info_ioctl()
755 vram_gtt.vram_size = adev->gmc.real_vram_size - in amdgpu_info_ioctl()
756 atomic64_read(&adev->vram_pin_size) - in amdgpu_info_ioctl()
759 min(adev->gmc.visible_vram_size - in amdgpu_info_ioctl()
760 atomic64_read(&adev->visible_pin_size), in amdgpu_info_ioctl()
762 vram_gtt.gtt_size = ttm_manager_type(&adev->mman.bdev, TTM_PL_TT)->size; in amdgpu_info_ioctl()
763 vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size); in amdgpu_info_ioctl()
765 min((size_t)size, sizeof(vram_gtt))) ? -EFAULT : 0; in amdgpu_info_ioctl()
768 struct drm_amdgpu_memory_info mem; in amdgpu_info_ioctl() local
770 &adev->mman.gtt_mgr.manager; in amdgpu_info_ioctl()
772 &adev->mman.vram_mgr.manager; in amdgpu_info_ioctl()
774 memset(&mem, 0, sizeof(mem)); in amdgpu_info_ioctl()
775 mem.vram.total_heap_size = adev->gmc.real_vram_size; in amdgpu_info_ioctl()
776 mem.vram.usable_heap_size = adev->gmc.real_vram_size - in amdgpu_info_ioctl()
777 atomic64_read(&adev->vram_pin_size) - in amdgpu_info_ioctl()
779 mem.vram.heap_usage = in amdgpu_info_ioctl()
781 mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4; in amdgpu_info_ioctl()
783 mem.cpu_accessible_vram.total_heap_size = in amdgpu_info_ioctl()
784 adev->gmc.visible_vram_size; in amdgpu_info_ioctl()
785 mem.cpu_accessible_vram.usable_heap_size = in amdgpu_info_ioctl()
786 min(adev->gmc.visible_vram_size - in amdgpu_info_ioctl()
787 atomic64_read(&adev->visible_pin_size), in amdgpu_info_ioctl()
788 mem.vram.usable_heap_size); in amdgpu_info_ioctl()
789 mem.cpu_accessible_vram.heap_usage = in amdgpu_info_ioctl()
790 amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr); in amdgpu_info_ioctl()
791 mem.cpu_accessible_vram.max_allocation = in amdgpu_info_ioctl()
792 mem.cpu_accessible_vram.usable_heap_size * 3 / 4; in amdgpu_info_ioctl()
794 mem.gtt.total_heap_size = gtt_man->size; in amdgpu_info_ioctl()
795 mem.gtt.usable_heap_size = mem.gtt.total_heap_size - in amdgpu_info_ioctl()
796 atomic64_read(&adev->gart_pin_size); in amdgpu_info_ioctl()
797 mem.gtt.heap_usage = ttm_resource_manager_usage(gtt_man); in amdgpu_info_ioctl()
798 mem.gtt.max_allocation = mem.gtt.usable_heap_size * 3 / 4; in amdgpu_info_ioctl()
800 return copy_to_user(out, &mem, in amdgpu_info_ioctl()
801 min((size_t)size, sizeof(mem))) in amdgpu_info_ioctl()
802 ? -EFAULT : 0; in amdgpu_info_ioctl()
807 unsigned int se_num = (info->read_mmr_reg.instance >> in amdgpu_info_ioctl()
810 unsigned int sh_num = (info->read_mmr_reg.instance >> in amdgpu_info_ioctl()
820 return -EINVAL; in amdgpu_info_ioctl()
824 return -EINVAL; in amdgpu_info_ioctl()
826 if (info->read_mmr_reg.count > 128) in amdgpu_info_ioctl()
827 return -EINVAL; in amdgpu_info_ioctl()
829 regs = kmalloc_array(info->read_mmr_reg.count, sizeof(*regs), GFP_KERNEL); in amdgpu_info_ioctl()
831 return -ENOMEM; in amdgpu_info_ioctl()
832 alloc_size = info->read_mmr_reg.count * sizeof(*regs); in amdgpu_info_ioctl()
835 for (i = 0; i < info->read_mmr_reg.count; i++) { in amdgpu_info_ioctl()
837 info->read_mmr_reg.dword_offset + i, in amdgpu_info_ioctl()
840 info->read_mmr_reg.dword_offset + i); in amdgpu_info_ioctl()
843 return -EFAULT; in amdgpu_info_ioctl()
849 return n ? -EFAULT : 0; in amdgpu_info_ioctl()
858 return -ENOMEM; in amdgpu_info_ioctl()
860 dev_info->device_id = adev->pdev->device; in amdgpu_info_ioctl()
861 dev_info->chip_rev = adev->rev_id; in amdgpu_info_ioctl()
862 dev_info->external_rev = adev->external_rev_id; in amdgpu_info_ioctl()
863 dev_info->pci_rev = adev->pdev->revision; in amdgpu_info_ioctl()
864 dev_info->family = adev->family; in amdgpu_info_ioctl()
865 dev_info->num_shader_engines = adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
866 dev_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_info_ioctl()
868 dev_info->gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10; in amdgpu_info_ioctl()
869 if (adev->pm.dpm_enabled) { in amdgpu_info_ioctl()
870 dev_info->max_engine_clock = amdgpu_dpm_get_sclk(adev, false) * 10; in amdgpu_info_ioctl()
871 dev_info->max_memory_clock = amdgpu_dpm_get_mclk(adev, false) * 10; in amdgpu_info_ioctl()
872 dev_info->min_engine_clock = amdgpu_dpm_get_sclk(adev, true) * 10; in amdgpu_info_ioctl()
873 dev_info->min_memory_clock = amdgpu_dpm_get_mclk(adev, true) * 10; in amdgpu_info_ioctl()
875 dev_info->max_engine_clock = in amdgpu_info_ioctl()
876 dev_info->min_engine_clock = in amdgpu_info_ioctl()
877 adev->clock.default_sclk * 10; in amdgpu_info_ioctl()
878 dev_info->max_memory_clock = in amdgpu_info_ioctl()
879 dev_info->min_memory_clock = in amdgpu_info_ioctl()
880 adev->clock.default_mclk * 10; in amdgpu_info_ioctl()
882 dev_info->enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask; in amdgpu_info_ioctl()
883 dev_info->num_rb_pipes = adev->gfx.config.max_backends_per_se * in amdgpu_info_ioctl()
884 adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
885 dev_info->num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts; in amdgpu_info_ioctl()
886 dev_info->ids_flags = 0; in amdgpu_info_ioctl()
887 if (adev->flags & AMD_IS_APU) in amdgpu_info_ioctl()
888 dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION; in amdgpu_info_ioctl()
889 if (adev->gfx.mcbp) in amdgpu_info_ioctl()
890 dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION; in amdgpu_info_ioctl()
892 dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ; in amdgpu_info_ioctl()
893 if (adev->gfx.config.ta_cntl2_truncate_coord_mode) in amdgpu_info_ioctl()
894 dev_info->ids_flags |= AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD; in amdgpu_info_ioctl()
896 vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()
897 vm_size -= AMDGPU_VA_RESERVED_SIZE; in amdgpu_info_ioctl()
900 if (adev->vce.fw_version && in amdgpu_info_ioctl()
901 adev->vce.fw_version < AMDGPU_VCE_FW_53_45) in amdgpu_info_ioctl()
904 dev_info->virtual_address_offset = AMDGPU_VA_RESERVED_SIZE; in amdgpu_info_ioctl()
905 dev_info->virtual_address_max = in amdgpu_info_ioctl()
909 dev_info->high_va_offset = AMDGPU_GMC_HOLE_END; in amdgpu_info_ioctl()
910 dev_info->high_va_max = AMDGPU_GMC_HOLE_END | vm_size; in amdgpu_info_ioctl()
912 dev_info->virtual_address_alignment = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); in amdgpu_info_ioctl()
913 dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()
914 dev_info->gart_page_size = max_t(u32, PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE); in amdgpu_info_ioctl()
915 dev_info->cu_active_number = adev->gfx.cu_info.number; in amdgpu_info_ioctl()
916 dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; in amdgpu_info_ioctl()
917 dev_info->ce_ram_size = adev->gfx.ce_ram_size; in amdgpu_info_ioctl()
918 memcpy(&dev_info->cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0], in amdgpu_info_ioctl()
919 sizeof(adev->gfx.cu_info.ao_cu_bitmap)); in amdgpu_info_ioctl()
920 memcpy(&dev_info->cu_bitmap[0], &adev->gfx.cu_info.bitmap[0], in amdgpu_info_ioctl()
921 sizeof(dev_info->cu_bitmap)); in amdgpu_info_ioctl()
922 dev_info->vram_type = adev->gmc.vram_type; in amdgpu_info_ioctl()
923 dev_info->vram_bit_width = adev->gmc.vram_width; in amdgpu_info_ioctl()
924 dev_info->vce_harvest_config = adev->vce.harvest_config; in amdgpu_info_ioctl()
925 dev_info->gc_double_offchip_lds_buf = in amdgpu_info_ioctl()
926 adev->gfx.config.double_offchip_lds_buf; in amdgpu_info_ioctl()
927 dev_info->wave_front_size = adev->gfx.cu_info.wave_front_size; in amdgpu_info_ioctl()
928 dev_info->num_shader_visible_vgprs = adev->gfx.config.max_gprs; in amdgpu_info_ioctl()
929 dev_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh; in amdgpu_info_ioctl()
930 dev_info->num_tcc_blocks = adev->gfx.config.max_texture_channel_caches; in amdgpu_info_ioctl()
931 dev_info->gs_vgt_table_depth = adev->gfx.config.gs_vgt_table_depth; in amdgpu_info_ioctl()
932 dev_info->gs_prim_buffer_depth = adev->gfx.config.gs_prim_buffer_depth; in amdgpu_info_ioctl()
933 dev_info->max_gs_waves_per_vgt = adev->gfx.config.max_gs_threads; in amdgpu_info_ioctl()
935 if (adev->family >= AMDGPU_FAMILY_NV) in amdgpu_info_ioctl()
936 dev_info->pa_sc_tile_steering_override = in amdgpu_info_ioctl()
937 adev->gfx.config.pa_sc_tile_steering_override; in amdgpu_info_ioctl()
939 dev_info->tcc_disabled_mask = adev->gfx.config.tcc_disabled_mask; in amdgpu_info_ioctl()
942 pcie_gen_mask = adev->pm.pcie_gen_mask & (adev->pm.pcie_gen_mask >> 16); in amdgpu_info_ioctl()
943 dev_info->pcie_gen = fls(pcie_gen_mask); in amdgpu_info_ioctl()
944 dev_info->pcie_num_lanes = in amdgpu_info_ioctl()
945 adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X32 ? 32 : in amdgpu_info_ioctl()
946 adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16 ? 16 : in amdgpu_info_ioctl()
947 adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12 ? 12 : in amdgpu_info_ioctl()
948 adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 ? 8 : in amdgpu_info_ioctl()
949 adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4 ? 4 : in amdgpu_info_ioctl()
950 adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2 ? 2 : 1; in amdgpu_info_ioctl()
952 dev_info->tcp_cache_size = adev->gfx.config.gc_tcp_l1_size; in amdgpu_info_ioctl()
953 dev_info->num_sqc_per_wgp = adev->gfx.config.gc_num_sqc_per_wgp; in amdgpu_info_ioctl()
954 dev_info->sqc_data_cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc; in amdgpu_info_ioctl()
955 dev_info->sqc_inst_cache_size = adev->gfx.config.gc_l1_instruction_cache_size_per_sqc; in amdgpu_info_ioctl()
956 dev_info->gl1c_cache_size = adev->gfx.config.gc_gl1c_size_per_instance * in amdgpu_info_ioctl()
957 adev->gfx.config.gc_gl1c_per_sa; in amdgpu_info_ioctl()
958 dev_info->gl2c_cache_size = adev->gfx.config.gc_gl2c_per_gpu; in amdgpu_info_ioctl()
959 dev_info->mall_size = adev->gmc.mall_size; in amdgpu_info_ioctl()
962 if (adev->gfx.funcs->get_gfx_shadow_info) { in amdgpu_info_ioctl()
967 dev_info->shadow_size = shadow_info.shadow_size; in amdgpu_info_ioctl()
968 dev_info->shadow_alignment = shadow_info.shadow_alignment; in amdgpu_info_ioctl()
969 dev_info->csa_size = shadow_info.csa_size; in amdgpu_info_ioctl()
970 dev_info->csa_alignment = shadow_info.csa_alignment; in amdgpu_info_ioctl()
975 min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0; in amdgpu_info_ioctl()
987 vce_clk_table.entries[i].sclk = vce_state->sclk; in amdgpu_info_ioctl()
988 vce_clk_table.entries[i].mclk = vce_state->mclk; in amdgpu_info_ioctl()
989 vce_clk_table.entries[i].eclk = vce_state->evclk; in amdgpu_info_ioctl()
995 min((size_t)size, sizeof(vce_clk_table))) ? -EFAULT : 0; in amdgpu_info_ioctl()
998 uint32_t bios_size = adev->bios_size; in amdgpu_info_ioctl()
1000 switch (info->vbios_info.type) { in amdgpu_info_ioctl()
1004 ? -EFAULT : 0; in amdgpu_info_ioctl()
1007 uint32_t bios_offset = info->vbios_info.offset; in amdgpu_info_ioctl()
1010 return -EINVAL; in amdgpu_info_ioctl()
1012 bios = adev->bios + bios_offset; in amdgpu_info_ioctl()
1014 min((size_t)size, (size_t)(bios_size - bios_offset))) in amdgpu_info_ioctl()
1015 ? -EFAULT : 0; in amdgpu_info_ioctl()
1021 atom_context = adev->mode_info.atom_context; in amdgpu_info_ioctl()
1023 memcpy(vbios_info.name, atom_context->name, in amdgpu_info_ioctl()
1024 sizeof(atom_context->name)); in amdgpu_info_ioctl()
1025 memcpy(vbios_info.vbios_pn, atom_context->vbios_pn, in amdgpu_info_ioctl()
1026 sizeof(atom_context->vbios_pn)); in amdgpu_info_ioctl()
1027 vbios_info.version = atom_context->version; in amdgpu_info_ioctl()
1028 memcpy(vbios_info.vbios_ver_str, atom_context->vbios_ver_str, in amdgpu_info_ioctl()
1029 sizeof(atom_context->vbios_ver_str)); in amdgpu_info_ioctl()
1030 memcpy(vbios_info.date, atom_context->date, in amdgpu_info_ioctl()
1031 sizeof(atom_context->date)); in amdgpu_info_ioctl()
1035 min((size_t)size, sizeof(vbios_info))) ? -EFAULT : 0; in amdgpu_info_ioctl()
1039 info->vbios_info.type); in amdgpu_info_ioctl()
1040 return -EINVAL; in amdgpu_info_ioctl()
1046 switch (info->query_hw_ip.type) { in amdgpu_info_ioctl()
1049 if (adev->asic_type < CHIP_POLARIS10) { in amdgpu_info_ioctl()
1050 handle.uvd_max_handles = adev->uvd.max_handles; in amdgpu_info_ioctl()
1054 min((size_t)size, sizeof(handle))) ? -EFAULT : 0; in amdgpu_info_ioctl()
1056 return -ENODATA; in amdgpu_info_ioctl()
1061 return -EINVAL; in amdgpu_info_ioctl()
1065 if (!adev->pm.dpm_enabled) in amdgpu_info_ioctl()
1066 return -ENOENT; in amdgpu_info_ioctl()
1068 switch (info->sensor_info.type) { in amdgpu_info_ioctl()
1074 return -EINVAL; in amdgpu_info_ioctl()
1083 return -EINVAL; in amdgpu_info_ioctl()
1092 return -EINVAL; in amdgpu_info_ioctl()
1100 return -EINVAL; in amdgpu_info_ioctl()
1112 return -EINVAL; in amdgpu_info_ioctl()
1122 return -EINVAL; in amdgpu_info_ioctl()
1130 return -EINVAL; in amdgpu_info_ioctl()
1138 return -EINVAL; in amdgpu_info_ioctl()
1147 return -EINVAL; in amdgpu_info_ioctl()
1156 return -EINVAL; in amdgpu_info_ioctl()
1165 return -EINVAL; in amdgpu_info_ioctl()
1171 info->sensor_info.type); in amdgpu_info_ioctl()
1172 return -EINVAL; in amdgpu_info_ioctl()
1174 return copy_to_user(out, &ui32, min(size, 4u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
1177 ui32 = atomic_read(&adev->vram_lost_counter); in amdgpu_info_ioctl()
1178 return copy_to_user(out, &ui32, min(size, 4u)) ? -EFAULT : 0; in amdgpu_info_ioctl()
1184 return -EINVAL; in amdgpu_info_ioctl()
1185 ras_mask = (uint64_t)adev->ras_enabled << 32 | ras->features; in amdgpu_info_ioctl()
1189 -EFAULT : 0; in amdgpu_info_ioctl()
1196 if (!adev->asic_funcs->query_video_codecs) in amdgpu_info_ioctl()
1197 return -EINVAL; in amdgpu_info_ioctl()
1199 switch (info->video_cap.type) { in amdgpu_info_ioctl()
1203 return -EINVAL; in amdgpu_info_ioctl()
1208 return -EINVAL; in amdgpu_info_ioctl()
1212 info->video_cap.type); in amdgpu_info_ioctl()
1213 return -EINVAL; in amdgpu_info_ioctl()
1218 return -ENOMEM; in amdgpu_info_ioctl()
1220 for (i = 0; i < codecs->codec_count; i++) { in amdgpu_info_ioctl()
1221 int idx = codecs->codec_array[i].codec_type; in amdgpu_info_ioctl()
1232 caps->codec_info[idx].valid = 1; in amdgpu_info_ioctl()
1233 caps->codec_info[idx].max_width = in amdgpu_info_ioctl()
1234 codecs->codec_array[i].max_width; in amdgpu_info_ioctl()
1235 caps->codec_info[idx].max_height = in amdgpu_info_ioctl()
1236 codecs->codec_array[i].max_height; in amdgpu_info_ioctl()
1237 caps->codec_info[idx].max_pixels_per_frame = in amdgpu_info_ioctl()
1238 codecs->codec_array[i].max_pixels_per_frame; in amdgpu_info_ioctl()
1239 caps->codec_info[idx].max_level = in amdgpu_info_ioctl()
1240 codecs->codec_array[i].max_level; in amdgpu_info_ioctl()
1247 min((size_t)size, sizeof(*caps))) ? -EFAULT : 0; in amdgpu_info_ioctl()
1258 min((size_t)size, sizeof(max_ibs))) ? -EFAULT : 0; in amdgpu_info_ioctl()
1261 struct amdgpu_fpriv *fpriv = filp->driver_priv; in amdgpu_info_ioctl()
1262 struct amdgpu_vm *vm = &fpriv->vm; in amdgpu_info_ioctl()
1267 return -EINVAL; in amdgpu_info_ioctl()
1271 xa_lock_irqsave(&adev->vm_manager.pasids, flags); in amdgpu_info_ioctl()
1272 gpuvm_fault.addr = vm->fault_info.addr; in amdgpu_info_ioctl()
1273 gpuvm_fault.status = vm->fault_info.status; in amdgpu_info_ioctl()
1274 gpuvm_fault.vmhub = vm->fault_info.vmhub; in amdgpu_info_ioctl()
1275 xa_unlock_irqrestore(&adev->vm_manager.pasids, flags); in amdgpu_info_ioctl()
1278 min((size_t)size, sizeof(gpuvm_fault))) ? -EFAULT : 0; in amdgpu_info_ioctl()
1281 DRM_DEBUG_KMS("Invalid request %d\n", info->query); in amdgpu_info_ioctl()
1282 return -EINVAL; in amdgpu_info_ioctl()
1292 * amdgpu_driver_lastclose_kms - drm callback for last close
1305 * amdgpu_driver_open_kms - drm callback for open
1320 flush_delayed_work(&adev->delayed_init_work); in amdgpu_driver_open_kms()
1325 return -EHWPOISON; in amdgpu_driver_open_kms()
1328 file_priv->driver_priv = NULL; in amdgpu_driver_open_kms()
1330 r = pm_runtime_get_sync(dev->dev); in amdgpu_driver_open_kms()
1336 r = -ENOMEM; in amdgpu_driver_open_kms()
1342 dev_warn(adev->dev, "No more PASIDs available!"); in amdgpu_driver_open_kms()
1350 r = amdgpu_vm_init(adev, &fpriv->vm, fpriv->xcp_id); in amdgpu_driver_open_kms()
1354 r = amdgpu_vm_set_pasid(adev, &fpriv->vm, pasid); in amdgpu_driver_open_kms()
1358 fpriv->prt_va = amdgpu_vm_bo_add(adev, &fpriv->vm, NULL); in amdgpu_driver_open_kms()
1359 if (!fpriv->prt_va) { in amdgpu_driver_open_kms()
1360 r = -ENOMEM; in amdgpu_driver_open_kms()
1364 if (adev->gfx.mcbp) { in amdgpu_driver_open_kms()
1367 r = amdgpu_map_static_csa(adev, &fpriv->vm, adev->virt.csa_obj, in amdgpu_driver_open_kms()
1368 &fpriv->csa_va, csa_addr, AMDGPU_CSA_SIZE); in amdgpu_driver_open_kms()
1373 mutex_init(&fpriv->bo_list_lock); in amdgpu_driver_open_kms()
1374 idr_init_base(&fpriv->bo_list_handles, 1); in amdgpu_driver_open_kms()
1376 amdgpu_ctx_mgr_init(&fpriv->ctx_mgr, adev); in amdgpu_driver_open_kms()
1378 file_priv->driver_priv = fpriv; in amdgpu_driver_open_kms()
1382 amdgpu_vm_fini(adev, &fpriv->vm); in amdgpu_driver_open_kms()
1387 amdgpu_vm_set_pasid(adev, &fpriv->vm, 0); in amdgpu_driver_open_kms()
1393 pm_runtime_mark_last_busy(dev->dev); in amdgpu_driver_open_kms()
1395 pm_runtime_put_autosuspend(dev->dev); in amdgpu_driver_open_kms()
1401 * amdgpu_driver_postclose_kms - drm callback for post close
1412 struct amdgpu_fpriv *fpriv = file_priv->driver_priv; in amdgpu_driver_postclose_kms()
1421 pm_runtime_get_sync(dev->dev); in amdgpu_driver_postclose_kms()
1428 if (fpriv->csa_va) { in amdgpu_driver_postclose_kms()
1431 WARN_ON(amdgpu_unmap_static_csa(adev, &fpriv->vm, adev->virt.csa_obj, in amdgpu_driver_postclose_kms()
1432 fpriv->csa_va, csa_addr)); in amdgpu_driver_postclose_kms()
1433 fpriv->csa_va = NULL; in amdgpu_driver_postclose_kms()
1438 pasid = fpriv->vm.pasid; in amdgpu_driver_postclose_kms()
1439 pd = amdgpu_bo_ref(fpriv->vm.root.bo); in amdgpu_driver_postclose_kms()
1441 amdgpu_vm_bo_del(adev, fpriv->prt_va); in amdgpu_driver_postclose_kms()
1445 amdgpu_ctx_mgr_fini(&fpriv->ctx_mgr); in amdgpu_driver_postclose_kms()
1446 amdgpu_vm_fini(adev, &fpriv->vm); in amdgpu_driver_postclose_kms()
1449 amdgpu_pasid_free_delayed(pd->tbo.base.resv, pasid); in amdgpu_driver_postclose_kms()
1452 idr_for_each_entry(&fpriv->bo_list_handles, list, handle) in amdgpu_driver_postclose_kms()
1455 idr_destroy(&fpriv->bo_list_handles); in amdgpu_driver_postclose_kms()
1456 mutex_destroy(&fpriv->bo_list_lock); in amdgpu_driver_postclose_kms()
1459 file_priv->driver_priv = NULL; in amdgpu_driver_postclose_kms()
1461 pm_runtime_mark_last_busy(dev->dev); in amdgpu_driver_postclose_kms()
1462 pm_runtime_put_autosuspend(dev->dev); in amdgpu_driver_postclose_kms()
1471 pci_set_drvdata(adev->pdev, NULL); in amdgpu_driver_release_kms()
1478 * amdgpu_get_vblank_counter_kms - get frame count
1483 * Returns frame count on success, -EINVAL on failure.
1487 struct drm_device *dev = crtc->dev; in amdgpu_get_vblank_counter_kms()
1488 unsigned int pipe = crtc->index; in amdgpu_get_vblank_counter_kms()
1493 if (pipe >= adev->mode_info.num_crtc) { in amdgpu_get_vblank_counter_kms()
1495 return -EINVAL; in amdgpu_get_vblank_counter_kms()
1506 if (adev->mode_info.crtcs[pipe]) { in amdgpu_get_vblank_counter_kms()
1519 &adev->mode_info.crtcs[pipe]->base.hwmode); in amdgpu_get_vblank_counter_kms()
1546 * amdgpu_enable_vblank_kms - enable vblank interrupt
1551 * Returns 0 on success, -EINVAL on failure.
1555 struct drm_device *dev = crtc->dev; in amdgpu_enable_vblank_kms()
1556 unsigned int pipe = crtc->index; in amdgpu_enable_vblank_kms()
1560 return amdgpu_irq_get(adev, &adev->crtc_irq, idx); in amdgpu_enable_vblank_kms()
1564 * amdgpu_disable_vblank_kms - disable vblank interrupt
1572 struct drm_device *dev = crtc->dev; in amdgpu_disable_vblank_kms()
1573 unsigned int pipe = crtc->index; in amdgpu_disable_vblank_kms()
1577 amdgpu_irq_put(adev, &adev->crtc_irq, idx); in amdgpu_disable_vblank_kms()
1587 struct amdgpu_device *adev = m->private; in amdgpu_debugfs_firmware_info_show()
1590 struct atom_context *ctx = adev->mode_info.atom_context; in amdgpu_debugfs_firmware_info_show()
1669 /* RLC SAVE RESTORE LIST GPM MEM */ in amdgpu_debugfs_firmware_info_show()
1677 /* RLC SAVE RESTORE LIST SRM MEM */ in amdgpu_debugfs_firmware_info_show()
1711 if (adev->gfx.mec2_fw) { in amdgpu_debugfs_firmware_info_show()
1771 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_debugfs_firmware_info_show()
1813 if (adev->psp.cap_fw) { in amdgpu_debugfs_firmware_info_show()
1846 seq_printf(m, "VBIOS version: %s\n", ctx->vbios_pn); in amdgpu_debugfs_firmware_info_show()
1858 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_debugfs_firmware_init()
1859 struct dentry *root = minor->debugfs_root; in amdgpu_debugfs_firmware_init()