Lines Matching defs:amdgpu_gmc
208 struct amdgpu_gmc { struct
214 resource_size_t aper_size;
215 resource_size_t aper_base;
218 u64 mc_vram_size;
219 u64 visible_vram_size;
230 u64 agp_size;
231 u64 agp_start;
232 u64 agp_end;
241 u64 gart_size;
242 u64 gart_start;
243 u64 gart_end;
254 u64 vram_start;
255 u64 vram_end;
262 u64 fb_start;
263 u64 fb_end;
287 struct amdgpu_gmc_fault fault_ring[AMDGPU_GMC_FAULT_RING_SIZE]; argument
298 const struct amdgpu_gmc_funcs *gmc_funcs; argument
300 struct amdgpu_xgmi xgmi;
301 struct amdgpu_irq_src ecc_irq;
302 int noretry;
304 uint32_t vmid0_page_table_block_size;
305 uint32_t vmid0_page_table_depth;
306 struct amdgpu_bo *pdb0_bo;
308 void *ptr_pdb0;
311 u64 mall_size;
312 uint32_t m_half_use;
315 int num_umc;
317 u64 VM_L2_CNTL;
318 u64 VM_L2_CNTL2;
319 u64 VM_DUMMY_PAGE_FAULT_CNTL;
320 u64 VM_DUMMY_PAGE_FAULT_ADDR_LO32;
321 u64 VM_DUMMY_PAGE_FAULT_ADDR_HI32;
322 u64 VM_L2_PROTECTION_FAULT_CNTL;
323 u64 VM_L2_PROTECTION_FAULT_CNTL2;
324 u64 VM_L2_PROTECTION_FAULT_MM_CNTL3;
325 u64 VM_L2_PROTECTION_FAULT_MM_CNTL4;
326 u64 VM_L2_PROTECTION_FAULT_ADDR_LO32;
350 #define amdgpu_gmc_emit_flush_gpu_tlb(r, vmid, addr) (r)->adev->gmc.gmc_funcs->emit_flush_gpu_tlb((… argument
368 static inline bool amdgpu_gmc_vram_full_visible(struct amdgpu_gmc *gmc) in amdgpu_gmc_vram_full_visible() argument