73 	struct ixp4xx_gpio *g = gpiochip_get_data(gc);  in ixp4xx_gpio_irq_ack()  local
75 	__raw_writel(BIT(d->hwirq), g->base + IXP4XX_REG_GPIS);  in ixp4xx_gpio_irq_ack()
89 	struct ixp4xx_gpio *g = gpiochip_get_data(gc);  in ixp4xx_gpio_irq_unmask()  local
92 	if (!(g->irq_edge & BIT(d->hwirq)))  in ixp4xx_gpio_irq_unmask()
102 	struct ixp4xx_gpio *g = gpiochip_get_data(gc);  in ixp4xx_gpio_irq_set_type()  local
113 		g->irq_edge |= BIT(d->hwirq);  in ixp4xx_gpio_irq_set_type()
118 		g->irq_edge |= BIT(d->hwirq);  in ixp4xx_gpio_irq_set_type()
123 		g->irq_edge |= BIT(d->hwirq);  in ixp4xx_gpio_irq_set_type()
128 		g->irq_edge &= ~BIT(d->hwirq);  in ixp4xx_gpio_irq_set_type()
133 		g->irq_edge &= ~BIT(d->hwirq);  in ixp4xx_gpio_irq_set_type()
148 	raw_spin_lock_irqsave(&g->gc.bgpio_lock, flags);  in ixp4xx_gpio_irq_set_type()
151 	val = __raw_readl(g->base + int_reg);  in ixp4xx_gpio_irq_set_type()
153 	__raw_writel(val, g->base + int_reg);  in ixp4xx_gpio_irq_set_type()
155 	__raw_writel(BIT(line), g->base + IXP4XX_REG_GPIS);  in ixp4xx_gpio_irq_set_type()
158 	val = __raw_readl(g->base + int_reg);  in ixp4xx_gpio_irq_set_type()
160 	__raw_writel(val, g->base + int_reg);  in ixp4xx_gpio_irq_set_type()
163 	val = __raw_readl(g->base + IXP4XX_REG_GPOE);  in ixp4xx_gpio_irq_set_type()
165 	__raw_writel(val, g->base + IXP4XX_REG_GPOE);  in ixp4xx_gpio_irq_set_type()
167 	raw_spin_unlock_irqrestore(&g->gc.bgpio_lock, flags);  in ixp4xx_gpio_irq_set_type()
214 	struct ixp4xx_gpio *g;  in ixp4xx_gpio_probe()  local
221 	g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL);  in ixp4xx_gpio_probe()
222 	if (!g)  in ixp4xx_gpio_probe()
224 	g->dev = dev;  in ixp4xx_gpio_probe()
226 	g->base = devm_platform_ioremap_resource(pdev, 0);  in ixp4xx_gpio_probe()
227 	if (IS_ERR(g->base))  in ixp4xx_gpio_probe()
228 		return PTR_ERR(g->base);  in ixp4xx_gpio_probe()
240 	g->fwnode = of_node_to_fwnode(np);  in ixp4xx_gpio_probe()
263 		val = __raw_readl(g->base + IXP4XX_REG_GPCLK);  in ixp4xx_gpio_probe()
283 	__raw_writel(val, g->base + IXP4XX_REG_GPCLK);  in ixp4xx_gpio_probe()
301 	ret = bgpio_init(&g->gc, dev, 4,  in ixp4xx_gpio_probe()
302 			 g->base + IXP4XX_REG_GPIN,  in ixp4xx_gpio_probe()
303 			 g->base + IXP4XX_REG_GPOUT,  in ixp4xx_gpio_probe()
306 			 g->base + IXP4XX_REG_GPOE,  in ixp4xx_gpio_probe()
312 	g->gc.ngpio = 16;  in ixp4xx_gpio_probe()
313 	g->gc.label = "IXP4XX_GPIO_CHIP";  in ixp4xx_gpio_probe()
319 	g->gc.base = 0;  in ixp4xx_gpio_probe()
320 	g->gc.parent = &pdev->dev;  in ixp4xx_gpio_probe()
321 	g->gc.owner = THIS_MODULE;  in ixp4xx_gpio_probe()
323 	girq = &g->gc.irq;  in ixp4xx_gpio_probe()
325 	girq->fwnode = g->fwnode;  in ixp4xx_gpio_probe()
331 	ret = devm_gpiochip_add_data(dev, &g->gc, g);  in ixp4xx_gpio_probe()
337 	platform_set_drvdata(pdev, g);  in ixp4xx_gpio_probe()