1 // SPDX-License-Identifier: GPL-2.0
3  * KUnit test for the FPGA Region
11 #include <linux/fpga/fpga-bridge.h>
12 #include <linux/fpga/fpga-mgr.h>
13 #include <linux/fpga/fpga-region.h>
30 	struct fpga_bridge *bridge;  member
40 	struct mgr_stats *stats = mgr->priv;  in op_write()
42 	stats->write_count++;  in op_write()
48  * Fake FPGA manager that implements only the write op to count the number
57 static int op_enable_set(struct fpga_bridge *bridge, bool enable)  in op_enable_set()  argument
59 	struct bridge_stats *stats = bridge->priv;  in op_enable_set()
61 	if (!stats->enable && enable)  in op_enable_set()
62 		stats->cycles_count++;  in op_enable_set()
64 	stats->enable = enable;  in op_enable_set()
70  * Fake FPGA bridge that implements only enable_set op to count the number
79 	struct fpga_bridge *bridge = region->priv;  in fake_region_get_bridges()  local
81 	return fpga_bridge_get_to_list(bridge->dev.parent, region->info, &region->bridge_list);  in fake_region_get_bridges()
86 	return dev->parent == data;  in fake_region_match()
91 	struct test_ctx *ctx = test->priv;  in fpga_region_test_class_find()
94 	region = fpga_region_class_find(NULL, &ctx->region_pdev->dev, fake_region_match);  in fpga_region_test_class_find()
95 	KUNIT_EXPECT_PTR_EQ(test, region, ctx->region);  in fpga_region_test_class_find()
97 	put_device(&region->dev);  in fpga_region_test_class_find()
101  * FPGA Region programming test. The Region must call get_bridges() to get
106 	struct test_ctx *ctx = test->priv;  in fpga_region_test_program_fpga()
111 	img_info = fpga_image_info_alloc(&ctx->mgr_pdev->dev);  in fpga_region_test_program_fpga()
114 	img_info->buf = img_buf;  in fpga_region_test_program_fpga()
115 	img_info->count = sizeof(img_buf);  in fpga_region_test_program_fpga()
117 	ctx->region->info = img_info;  in fpga_region_test_program_fpga()
118 	ret = fpga_region_program_fpga(ctx->region);  in fpga_region_test_program_fpga()
121 	KUNIT_EXPECT_EQ(test, 1, ctx->mgr_stats.write_count);  in fpga_region_test_program_fpga()
122 	KUNIT_EXPECT_EQ(test, 1, ctx->bridge_stats.cycles_count);  in fpga_region_test_program_fpga()
124 	fpga_bridges_put(&ctx->region->bridge_list);  in fpga_region_test_program_fpga()
126 	ret = fpga_region_program_fpga(ctx->region);  in fpga_region_test_program_fpga()
129 	KUNIT_EXPECT_EQ(test, 2, ctx->mgr_stats.write_count);  in fpga_region_test_program_fpga()
130 	KUNIT_EXPECT_EQ(test, 2, ctx->bridge_stats.cycles_count);  in fpga_region_test_program_fpga()
132 	fpga_bridges_put(&ctx->region->bridge_list);  in fpga_region_test_program_fpga()
138  * The configuration used in this test suite uses a single bridge to
141  * multiple bridges) in the Bridge suite.
151 	ctx->mgr_pdev = platform_device_register_simple("mgr_pdev", PLATFORM_DEVID_AUTO, NULL, 0);  in fpga_region_test_init()
152 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->mgr_pdev);  in fpga_region_test_init()
154 	ctx->mgr = devm_fpga_mgr_register(&ctx->mgr_pdev->dev, "Fake FPGA Manager", &fake_mgr_ops,  in fpga_region_test_init()
155 					  &ctx->mgr_stats);  in fpga_region_test_init()
156 	KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->mgr));  in fpga_region_test_init()
158 	ctx->bridge_pdev = platform_device_register_simple("bridge_pdev", PLATFORM_DEVID_AUTO,  in fpga_region_test_init()
160 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->bridge_pdev);  in fpga_region_test_init()
162 	ctx->bridge = fpga_bridge_register(&ctx->bridge_pdev->dev, "Fake FPGA Bridge",  in fpga_region_test_init()
163 					   &fake_bridge_ops, &ctx->bridge_stats);  in fpga_region_test_init()
164 	KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->bridge));  in fpga_region_test_init()
166 	ctx->bridge_stats.enable = true;  in fpga_region_test_init()
168 	ctx->region_pdev = platform_device_register_simple("region_pdev", PLATFORM_DEVID_AUTO,  in fpga_region_test_init()
170 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->region_pdev);  in fpga_region_test_init()
172 	region_info.mgr = ctx->mgr;  in fpga_region_test_init()
173 	region_info.priv = ctx->bridge;  in fpga_region_test_init()
176 	ctx->region = fpga_region_register_full(&ctx->region_pdev->dev, &region_info);  in fpga_region_test_init()
177 	KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->region));  in fpga_region_test_init()
179 	test->priv = ctx;  in fpga_region_test_init()
186 	struct test_ctx *ctx = test->priv;  in fpga_region_test_exit()
188 	fpga_region_unregister(ctx->region);  in fpga_region_test_exit()
189 	platform_device_unregister(ctx->region_pdev);  in fpga_region_test_exit()
191 	fpga_bridge_unregister(ctx->bridge);  in fpga_region_test_exit()
192 	platform_device_unregister(ctx->bridge_pdev);  in fpga_region_test_exit()
194 	platform_device_unregister(ctx->mgr_pdev);  in fpga_region_test_exit()