Lines Matching full:dw
32 #include "dw-axi-dmac.h"
37 * The set of bus widths supported by the DMA controller. DW AXI DMAC supports
105 if (chan->chip->dw->hdata->reg_map_8_channels && in axi_chan_config_write()
106 !chan->chip->dw->hdata->use_cfg2) { in axi_chan_config_write()
198 if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) { in axi_chan_disable()
213 if (chan->chip->dw->hdata->reg_map_8_channels) in axi_chan_disable()
225 if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) { in axi_chan_enable()
239 if (chan->chip->dw->hdata->reg_map_8_channels) { in axi_chan_enable()
254 if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) in axi_chan_is_hw_enable()
270 for (i = 0; i < chip->dw->hdata->nr_channels; i++) { in axi_dma_hw_init()
271 axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); in axi_dma_hw_init()
272 axi_chan_disable(&chip->dw->chan[i]); in axi_dma_hw_init()
282 u32 max_width = chan->chip->dw->hdata->m_data_width; in axi_chan_get_xfer_width()
425 u32 priority = chan->chip->dw->hdata->priority[chan->id]; in axi_chan_block_xfer_start()
640 if (desc->chan->chip->dw->hdata->nr_masters > 1) in set_desc_dest_master()
652 unsigned int data_width = BIT(chan->chip->dw->hdata->m_data_width); in dw_axi_dma_set_hw_desc()
661 axi_block_ts = chan->chip->dw->hdata->block_size[chan->id]; in dw_axi_dma_set_hw_desc()
704 if (chan->chip->dw->hdata->restrict_axi_burst_len) { in dw_axi_dma_set_hw_desc()
705 burst_len = chan->chip->dw->hdata->axi_rw_burst_len; in dw_axi_dma_set_hw_desc()
740 axi_block_ts = chan->chip->dw->hdata->block_size[chan->id]; in calculate_block_len()
744 data_width = BIT(chan->chip->dw->hdata->m_data_width); in calculate_block_len()
934 max_block_ts = chan->chip->dw->hdata->block_size[chan->id]; in dma_chan_prep_dma_memcpy()
975 if (chan->chip->dw->hdata->restrict_axi_burst_len) { in dma_chan_prep_dma_memcpy()
976 u32 burst_len = chan->chip->dw->hdata->axi_rw_burst_len; in dma_chan_prep_dma_memcpy()
1154 struct dw_axi_dma *dw = chip->dw; in dw_axi_dma_interrupt() local
1163 for (i = 0; i < dw->hdata->nr_channels; i++) { in dw_axi_dma_interrupt()
1164 chan = &dw->chan[i]; in dw_axi_dma_interrupt()
1228 if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) { in dma_chan_pause()
1241 if (chan->chip->dw->hdata->reg_map_8_channels) { in dma_chan_pause()
1275 if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) { in axi_chan_resume()
1288 if (chan->chip->dw->hdata->reg_map_8_channels) { in axi_chan_resume()
1365 struct dw_axi_dma *dw = ofdma->of_dma_data; in dw_axi_dma_of_xlate() local
1369 dchan = dma_get_any_slave_channel(&dw->dma); in dw_axi_dma_of_xlate()
1390 chip->dw->hdata->nr_channels = tmp; in parse_device_properties()
1392 chip->dw->hdata->reg_map_8_channels = true; in parse_device_properties()
1400 chip->dw->hdata->nr_masters = tmp; in parse_device_properties()
1408 chip->dw->hdata->m_data_width = tmp; in parse_device_properties()
1411 chip->dw->hdata->nr_channels); in parse_device_properties()
1414 for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) { in parse_device_properties()
1418 chip->dw->hdata->block_size[tmp] = carr[tmp]; in parse_device_properties()
1422 chip->dw->hdata->nr_channels); in parse_device_properties()
1426 for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) { in parse_device_properties()
1427 if (carr[tmp] >= chip->dw->hdata->nr_channels) in parse_device_properties()
1430 chip->dw->hdata->priority[tmp] = carr[tmp]; in parse_device_properties()
1441 chip->dw->hdata->restrict_axi_burst_len = true; in parse_device_properties()
1442 chip->dw->hdata->axi_rw_burst_len = tmp; in parse_device_properties()
1451 struct dw_axi_dma *dw; in dw_probe() local
1462 dw = devm_kzalloc(&pdev->dev, sizeof(*dw), GFP_KERNEL); in dw_probe()
1463 if (!dw) in dw_probe()
1470 chip->dw = dw; in dw_probe()
1472 chip->dw->hdata = hdata; in dw_probe()
1499 chip->dw->hdata->use_cfg2 = !!(flags & AXI_DMA_FLAG_USE_CFG2); in dw_probe()
1513 dw->chan = devm_kcalloc(chip->dev, hdata->nr_channels, in dw_probe()
1514 sizeof(*dw->chan), GFP_KERNEL); in dw_probe()
1515 if (!dw->chan) in dw_probe()
1523 INIT_LIST_HEAD(&dw->dma.channels); in dw_probe()
1525 struct axi_dma_chan *chan = &dw->chan[i]; in dw_probe()
1533 vchan_init(&chan->vc, &dw->dma); in dw_probe()
1537 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); in dw_probe()
1538 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); in dw_probe()
1539 dma_cap_set(DMA_CYCLIC, dw->dma.cap_mask); in dw_probe()
1542 dw->dma.max_burst = hdata->axi_rw_burst_len; in dw_probe()
1543 dw->dma.src_addr_widths = AXI_DMA_BUSWIDTHS; in dw_probe()
1544 dw->dma.dst_addr_widths = AXI_DMA_BUSWIDTHS; in dw_probe()
1545 dw->dma.directions = BIT(DMA_MEM_TO_MEM); in dw_probe()
1546 dw->dma.directions |= BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM); in dw_probe()
1547 dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in dw_probe()
1549 dw->dma.dev = chip->dev; in dw_probe()
1550 dw->dma.device_tx_status = dma_chan_tx_status; in dw_probe()
1551 dw->dma.device_issue_pending = dma_chan_issue_pending; in dw_probe()
1552 dw->dma.device_terminate_all = dma_chan_terminate_all; in dw_probe()
1553 dw->dma.device_pause = dma_chan_pause; in dw_probe()
1554 dw->dma.device_resume = dma_chan_resume; in dw_probe()
1556 dw->dma.device_alloc_chan_resources = dma_chan_alloc_chan_resources; in dw_probe()
1557 dw->dma.device_free_chan_resources = dma_chan_free_chan_resources; in dw_probe()
1559 dw->dma.device_prep_dma_memcpy = dma_chan_prep_dma_memcpy; in dw_probe()
1560 dw->dma.device_synchronize = dw_axi_dma_synchronize; in dw_probe()
1561 dw->dma.device_config = dw_axi_dma_chan_slave_config; in dw_probe()
1562 dw->dma.device_prep_slave_sg = dw_axi_dma_chan_prep_slave_sg; in dw_probe()
1563 dw->dma.device_prep_dma_cyclic = dw_axi_dma_chan_prep_cyclic; in dw_probe()
1570 dw->dma.dev->dma_parms = &dw->dma_parms; in dw_probe()
1590 ret = dmaenginem_async_device_register(&dw->dma); in dw_probe()
1596 dw_axi_dma_of_xlate, dw); in dw_probe()
1602 dw->hdata->nr_channels); in dw_probe()
1615 struct dw_axi_dma *dw = chip->dw; in dw_remove() local
1623 for (i = 0; i < dw->hdata->nr_channels; i++) { in dw_remove()
1624 axi_chan_disable(&chip->dw->chan[i]); in dw_remove()
1625 axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); in dw_remove()
1636 list_for_each_entry_safe(chan, _chan, &dw->dma.channels, in dw_remove()