1 // SPDX-License-Identifier: GPL-2.0-only
11  * DOC: cxl pmem
13  * The core CXL PMEM infrastructure supports persistent memory
17  * CXL window. That root-level bridge corresponds to a LIBNVDIMM 'bus'
30 	ida_free(&cxl_nvdimm_bridge_ida, cxl_nvb->id);  in cxl_nvdimm_bridge_release()
47 	if (dev_WARN_ONCE(dev, dev->type != &cxl_nvdimm_bridge_type,  in to_cxl_nvdimm_bridge()
56 	return dev->type == &cxl_nvdimm_bridge_type;  in is_cxl_nvdimm_bridge()
68 		find_cxl_root(cxlmd->endpoint);  in cxl_find_nvdimm_bridge()
74 	dev = device_find_child(&cxl_root->port.dev, NULL, match_nvdimm_bridge);  in cxl_find_nvdimm_bridge()
93 		return ERR_PTR(-ENOMEM);  in cxl_nvdimm_bridge_alloc()
98 	cxl_nvb->id = rc;  in cxl_nvdimm_bridge_alloc()
100 	dev = &cxl_nvb->dev;  in cxl_nvdimm_bridge_alloc()
101 	cxl_nvb->port = port;  in cxl_nvdimm_bridge_alloc()
103 	lockdep_set_class(&dev->mutex, &cxl_nvdimm_bridge_key);  in cxl_nvdimm_bridge_alloc()
105 	dev->parent = &port->dev;  in cxl_nvdimm_bridge_alloc()
106 	dev->bus = &cxl_bus_type;  in cxl_nvdimm_bridge_alloc()
107 	dev->type = &cxl_nvdimm_bridge_type;  in cxl_nvdimm_bridge_alloc()
120 	device_unregister(&cxl_nvb->dev);  in unregister_nvb()
124  * devm_cxl_add_nvdimm_bridge() - add the root of a LIBNVDIMM topology
138 		return ERR_PTR(-ENXIO);  in devm_cxl_add_nvdimm_bridge()
144 	dev = &cxl_nvb->dev;  in devm_cxl_add_nvdimm_bridge()
145 	rc = dev_set_name(dev, "nvdimm-bridge%d", cxl_nvb->id);  in devm_cxl_add_nvdimm_bridge()
185 	return dev->type == &cxl_nvdimm_type;  in is_cxl_nvdimm()
208 		return ERR_PTR(-ENOMEM);  in cxl_nvdimm_alloc()
210 	dev = &cxl_nvd->dev;  in cxl_nvdimm_alloc()
211 	cxl_nvd->cxlmd = cxlmd;  in cxl_nvdimm_alloc()
212 	cxlmd->cxl_nvd = cxl_nvd;  in cxl_nvdimm_alloc()
214 	lockdep_set_class(&dev->mutex, &cxl_nvdimm_key);  in cxl_nvdimm_alloc()
216 	dev->parent = &cxlmd->dev;  in cxl_nvdimm_alloc()
217 	dev->bus = &cxl_bus_type;  in cxl_nvdimm_alloc()
218 	dev->type = &cxl_nvdimm_type;  in cxl_nvdimm_alloc()
220 	 * A "%llx" string is 17-bytes vs dimm_id that is max  in cxl_nvdimm_alloc()
223 	BUILD_BUG_ON(sizeof(cxl_nvd->dev_id) < 17 ||  in cxl_nvdimm_alloc()
224 		     sizeof(cxl_nvd->dev_id) > NVDIMM_KEY_DESC_LEN);  in cxl_nvdimm_alloc()
225 	sprintf(cxl_nvd->dev_id, "%llx", cxlmd->cxlds->serial);  in cxl_nvdimm_alloc()
233 	struct cxl_nvdimm *cxl_nvd = cxlmd->cxl_nvd;  in cxlmd_release_nvdimm()
234 	struct cxl_nvdimm_bridge *cxl_nvb = cxlmd->cxl_nvb;  in cxlmd_release_nvdimm()
236 	cxl_nvd->cxlmd = NULL;  in cxlmd_release_nvdimm()
237 	cxlmd->cxl_nvd = NULL;  in cxlmd_release_nvdimm()
238 	cxlmd->cxl_nvb = NULL;  in cxlmd_release_nvdimm()
239 	device_unregister(&cxl_nvd->dev);  in cxlmd_release_nvdimm()
240 	put_device(&cxl_nvb->dev);  in cxlmd_release_nvdimm()
244  * devm_cxl_add_nvdimm() - add a bridge between a cxl_memdev and an nvdimm
258 		return -ENODEV;  in devm_cxl_add_nvdimm()
265 	cxlmd->cxl_nvb = cxl_nvb;  in devm_cxl_add_nvdimm()
267 	dev = &cxl_nvd->dev;  in devm_cxl_add_nvdimm()
268 	rc = dev_set_name(dev, "pmem%d", cxlmd->id);  in devm_cxl_add_nvdimm()
276 	dev_dbg(&cxlmd->dev, "register %s\n", dev_name(dev));  in devm_cxl_add_nvdimm()
279 	return devm_add_action_or_reset(&cxlmd->dev, cxlmd_release_nvdimm, cxlmd);  in devm_cxl_add_nvdimm()
284 	cxlmd->cxl_nvb = NULL;  in devm_cxl_add_nvdimm()
285 	cxlmd->cxl_nvd = NULL;  in devm_cxl_add_nvdimm()
286 	put_device(&cxl_nvb->dev);  in devm_cxl_add_nvdimm()