Lines Matching +full:16 +full:bit
25 ICP_QAT_HW_AE_16 = 16,
56 ICP_QAT_HW_AUTH_RESERVED_2 = 16,
81 ICP_ACCEL_MASK_CIPHER_SLICE = BIT(0),
82 ICP_ACCEL_MASK_AUTH_SLICE = BIT(1),
83 ICP_ACCEL_MASK_PKE_SLICE = BIT(2),
84 ICP_ACCEL_MASK_COMPRESS_SLICE = BIT(3),
85 ICP_ACCEL_MASK_LZS_SLICE = BIT(4),
86 ICP_ACCEL_MASK_EIA3_SLICE = BIT(5),
87 ICP_ACCEL_MASK_SHA3_SLICE = BIT(6),
91 ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = BIT(0),
92 ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = BIT(1),
93 ICP_ACCEL_CAPABILITIES_CIPHER = BIT(2),
94 ICP_ACCEL_CAPABILITIES_AUTHENTICATION = BIT(3),
95 ICP_ACCEL_CAPABILITIES_RESERVED_1 = BIT(4),
96 ICP_ACCEL_CAPABILITIES_COMPRESSION = BIT(5),
98 ICP_ACCEL_CAPABILITIES_ZUC = BIT(8),
99 ICP_ACCEL_CAPABILITIES_SHA3 = BIT(9),
101 ICP_ACCEL_CAPABILITIES_HKDF = BIT(12),
102 ICP_ACCEL_CAPABILITIES_ECEDMONT = BIT(13),
103 ICP_ACCEL_CAPABILITIES_EXT_ALGCHAIN = BIT(14),
104 ICP_ACCEL_CAPABILITIES_SHA3_EXT = BIT(15),
105 ICP_ACCEL_CAPABILITIES_AESGCM_SPC = BIT(16),
106 ICP_ACCEL_CAPABILITIES_CHACHA_POLY = BIT(17),
107 ICP_ACCEL_CAPABILITIES_SM2 = BIT(18),
108 ICP_ACCEL_CAPABILITIES_SM3 = BIT(19),
109 ICP_ACCEL_CAPABILITIES_SM4 = BIT(20),
110 /* Bit 21 is currently reserved */
111 ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY = BIT(22),
112 ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64 = BIT(23),
113 ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION = BIT(24),
114 ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION = BIT(25),
115 ICP_ACCEL_CAPABILITIES_AES_V2 = BIT(26),
117 ICP_ACCEL_CAPABILITIES_ZUC_256 = BIT(29),
118 ICP_ACCEL_CAPABILITIES_WIRELESS_CRYPTO_EXT = BIT(30),
127 #define QAT_AUTH_SHA3_PADDING_BITPOS 16
159 #define ICP_QAT_HW_MD5_STATE1_SZ 16
169 #define ICP_QAT_HW_AES_XCBC_MAC_STATE1_SZ 16
170 #define ICP_QAT_HW_AES_CBC_MAC_STATE1_SZ 16
172 #define ICP_QAT_HW_KASUMI_F9_STATE1_SZ 16
173 #define ICP_QAT_HW_GALOIS_128_STATE1_SZ 16
177 #define ICP_QAT_HW_MD5_STATE2_SZ 16
187 #define ICP_QAT_HW_AES_XCBC_MAC_KEY_SZ 16
188 #define ICP_QAT_HW_AES_CBC_MAC_KEY_SZ 16
189 #define ICP_QAT_HW_AES_CCM_CBC_E_CTR0_SZ 16
190 #define ICP_QAT_HW_F9_IK_SZ 16
191 #define ICP_QAT_HW_F9_FK_SZ 16
197 #define ICP_QAT_HW_GALOIS_H_SZ 16
199 #define ICP_QAT_HW_GALOIS_E_CTR0_SZ 16
271 #define ICP_QAT_HW_AES_BLK_SZ 16
278 #define ICP_QAT_HW_AES_128_KEY_SZ 16
291 #define ICP_QAT_HW_KASUMI_KEY_SZ 16
299 #define ICP_QAT_HW_SNOW_3G_UEA2_KEY_SZ 16
300 #define ICP_QAT_HW_SNOW_3G_UEA2_IV_SZ 16
301 #define ICP_QAT_HW_ZUC_3G_EEA3_KEY_SZ 16
302 #define ICP_QAT_HW_ZUC_3G_EEA3_IV_SZ 16
366 #define QAT_COMPRESSION_DELAYED_MATCH_BITPOS 16