Lines Matching +full:stm32 +full:- +full:rng
1 # SPDX-License-Identifier: GPL-2.0-only
39 called padlock-aes.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
131 and uses triple-DES to generate secure random numbers like the
132 ANSI X9.17 standard. User-space programs access the
133 pseudo-random-number device through the char device /dev/prandom.
149 sub-units. One set provides the Modular Arithmetic Unit,
250 This option provides the kernel-side support for the TRNG hardware
320 This driver provides kernel-side support through the
325 module will be called exynos-rng.
350 needed for small and zero-size messages.
391 will be called atmel-aes.
404 will be called atmel-tdes.
417 will be called atmel-sha.
435 will be called atmel-ecc.
438 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
444 Microhip / Atmel SHA accelerator and RNG.
450 will be called atmel-sha204a.
474 co-processor on the die.
477 will be called mxs-dcp.
529 (default), hashes-only, or skciphers-only.
532 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
536 algorithms, sharing the load with the CPU. Enabling skciphers-only
546 - AES (CBC, CTR, ECB, XTS)
547 - 3DES (CBC, ECB)
548 - DES (CBC, ECB)
549 - SHA1, HMAC-SHA1
550 - SHA256, HMAC-SHA256
553 bool "Symmetric-key ciphers only"
556 Enable symmetric-key ciphers only:
557 - AES (CBC, CTR, ECB, XTS)
558 - 3DES (ECB, CBC)
559 - DES (ECB, CBC)
566 - SHA1, HMAC-SHA1
567 - SHA256, HMAC-SHA256
574 - authenc()
575 - ccm(aes)
576 - rfc4309(ccm(aes))
589 Considering the 256-bit ciphers, software is 2-3 times faster than
590 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
591 With 128-bit keys, the break-even point would be around 1024-bytes.
594 cost in CPU usage. The minimum recommended setting is 16-bytes
595 (1 AES block), since AES-GCM will fail if you set it lower.
598 Note that 192-bit keys are not supported by the hardware and are
612 module will be called qcom-rng. If unsure, say N.
671 Xilinx ZynqMP has AES-GCM engine used for symmetric key
706 source "drivers/crypto/stm32/Kconfig"
724 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
728 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
731 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
744 Enables the driver for the on-chip crypto accelerator