Lines Matching full:inputs
45 * BASE+0 Isolated outputs 0-7 (write) / inputs 0-7 (read)
46 * BASE+1 Isolated outputs 8-15 (write) / inputs 8-15 (read)
47 * BASE+2 TTL outputs 0-7 (write) / inputs 0-7 (read)
48 * BASE+3 TTL outputs 8-15 (write) / inputs 8-15 (read)
55 * BASE+1 Isolated inputs 0-7 (read)
61 * BASE+2 Isolated inputs 0-7 (read)
62 * BASE+3 Isolated inputs 8-15 (read)
66 * BASE+0 Isolated outputs 0-7 (write) or inputs 0-7 (read)
67 * BASE+1 Isolated outputs 8-15 (write) or inputs 8-15 (read)
68 * BASE+2 Isolated outputs 16-23 (write) or inputs 16-23 (read)
69 * BASE+3 Isolated outputs 24-31 (write) or inputs 24-31 (read)
75 * BASE+2 Isolated inputs 0-7 (read)
76 * BASE+3 Isolated inputs 8-15 (read)
97 * BASE+4 Isolated inputs 0-7 (read)
98 * BASE+5 Isolated inputs 8-15 (read)
99 * BASE+6 Isolated inputs 16-19 (read)
299 /* Isolated Digital Inputs */ in pcl730_attach()
323 /* TTL Digital Inputs */ in pcl730_attach()