403 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_set_rate()  local
407 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_set_rate()
410 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_set_rate()
412 	ret = stm32_divider_set_rate(composite->base, composite->clock_data,  in clk_stm32_composite_set_rate()
413 				     composite->div_id, rate, parent_rate);  in clk_stm32_composite_set_rate()
415 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_set_rate()
423 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_recalc_rate()  local
425 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_recalc_rate()
428 	return stm32_divider_get_rate(composite->base, composite->clock_data,  in clk_stm32_composite_recalc_rate()
429 				      composite->div_id, parent_rate);  in clk_stm32_composite_recalc_rate()
435 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_determine_rate()  local
439 	if (composite->div_id == NO_STM32_DIV)  in clk_stm32_composite_determine_rate()
442 	divider = &composite->clock_data->dividers[composite->div_id];  in clk_stm32_composite_determine_rate()
448 		val =  readl(composite->base + divider->offset) >> divider->shift;  in clk_stm32_composite_determine_rate()
473 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_get_parent()  local
475 	return stm32_mux_get_parent(composite->base, composite->clock_data, composite->mux_id);  in clk_stm32_composite_get_parent()
480 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_set_parent()  local
483 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_set_parent()
485 	stm32_mux_set_parent(composite->base, composite->clock_data, composite->mux_id, index);  in clk_stm32_composite_set_parent()
487 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_set_parent()
489 	if (composite->clock_data->is_multi_mux) {  in clk_stm32_composite_set_parent()
490 		struct clk_hw *other_mux_hw = composite->clock_data->is_multi_mux(hw);  in clk_stm32_composite_set_parent()
504 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_is_enabled()  local
506 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_is_enabled()
509 	return stm32_gate_is_enabled(composite->base, composite->clock_data, composite->gate_id);  in clk_stm32_composite_is_enabled()
516 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_has_safe_mux()  local
517 	const struct stm32_mux_cfg *mux = &composite->clock_data->muxes[composite->mux_id];  in clk_stm32_has_safe_mux()
524 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_set_safe_position_mux()  local
529 		if (composite->clock_data->is_multi_mux) {  in clk_stm32_set_safe_position_mux()
532 			other_mux_hw = composite->clock_data->is_multi_mux(hw);  in clk_stm32_set_safe_position_mux()
538 		spin_lock_irqsave(composite->lock, flags);  in clk_stm32_set_safe_position_mux()
540 		stm32_mux_set_parent(composite->base, composite->clock_data,  in clk_stm32_set_safe_position_mux()
541 				     composite->mux_id, MUX_SAFE_POSITION);  in clk_stm32_set_safe_position_mux()
543 		spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_set_safe_position_mux()
549 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_safe_restore_position_mux()  local
553 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_safe_restore_position_mux()
555 	stm32_mux_set_parent(composite->base, composite->clock_data, composite->mux_id, sel);  in clk_stm32_safe_restore_position_mux()
557 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_safe_restore_position_mux()
562 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_endisable()  local
565 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_gate_endisable()
567 	stm32_gate_endisable(composite->base, composite->clock_data, composite->gate_id, enable);  in clk_stm32_composite_gate_endisable()
569 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_gate_endisable()
574 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_enable()  local
576 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_gate_enable()
581 	if (composite->mux_id != NO_STM32_MUX && clk_stm32_has_safe_mux(hw))  in clk_stm32_composite_gate_enable()
589 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_gate_disable()  local
591 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_gate_disable()
596 	if (composite->mux_id != NO_STM32_MUX && clk_stm32_has_safe_mux(hw))  in clk_stm32_composite_gate_disable()
602 	struct clk_stm32_composite *composite = to_clk_stm32_composite(hw);  in clk_stm32_composite_disable_unused()  local
605 	if (composite->gate_id == NO_STM32_GATE)  in clk_stm32_composite_disable_unused()
608 	spin_lock_irqsave(composite->lock, flags);  in clk_stm32_composite_disable_unused()
610 	stm32_gate_disable_unused(composite->base, composite->clock_data, composite->gate_id);  in clk_stm32_composite_disable_unused()
612 	spin_unlock_irqrestore(composite->lock, flags);  in clk_stm32_composite_disable_unused()
696 	struct clk_stm32_composite *composite = cfg->clock_cfg;  in clk_stm32_composite_register()  local
697 	struct clk_hw *hw = &composite->hw;  in clk_stm32_composite_register()
700 	composite->base = base;  in clk_stm32_composite_register()
701 	composite->lock = lock;  in clk_stm32_composite_register()
702 	composite->clock_data = data->clock_data;  in clk_stm32_composite_register()