Lines Matching +full:rpm +full:- +full:requests
1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
18 #include <dt-bindings/mfd/qcom-rpm.h>
19 #include <dt-bindings/clock/qcom,rpmcc.h>
96 struct qcom_rpm *rpm; member
101 struct qcom_rpm *rpm; member
122 * RPM clock. in clk_rpm_handoff()
124 if (r->rpm_clk_id == QCOM_RPM_PLL_4 || in clk_rpm_handoff()
125 r->rpm_clk_id == QCOM_RPM_CXO_BUFFERS) in clk_rpm_handoff()
128 ret = qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE, in clk_rpm_handoff()
129 r->rpm_clk_id, &value, 1); in clk_rpm_handoff()
132 ret = qcom_rpm_write(r->rpm, QCOM_RPM_SLEEP_STATE, in clk_rpm_handoff()
133 r->rpm_clk_id, &value, 1); in clk_rpm_handoff()
144 return qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE, in clk_rpm_set_rate_active()
145 r->rpm_clk_id, &value, 1); in clk_rpm_set_rate_active()
152 return qcom_rpm_write(r->rpm, QCOM_RPM_SLEEP_STATE, in clk_rpm_set_rate_sleep()
153 r->rpm_clk_id, &value, 1); in clk_rpm_set_rate_sleep()
162 * Active-only clocks don't care what the rate is during sleep. So, in to_active_sleep()
165 if (r->active_only) in to_active_sleep()
174 struct clk_rpm *peer = r->peer; in clk_rpm_prepare()
182 /* Don't send requests to the RPM if the rate has not been set. */ in clk_rpm_prepare()
183 if (!r->rate) in clk_rpm_prepare()
186 to_active_sleep(r, r->rate, &this_rate, &this_sleep_rate); in clk_rpm_prepare()
189 if (peer->enabled) in clk_rpm_prepare()
190 to_active_sleep(peer, peer->rate, in clk_rpm_prepare()
195 if (r->branch) in clk_rpm_prepare()
203 if (r->branch) in clk_rpm_prepare()
213 r->enabled = true; in clk_rpm_prepare()
223 struct clk_rpm *peer = r->peer; in clk_rpm_unprepare()
230 if (!r->rate) in clk_rpm_unprepare()
234 if (peer->enabled) in clk_rpm_unprepare()
235 to_active_sleep(peer, peer->rate, &peer_rate, in clk_rpm_unprepare()
238 active_rate = r->branch ? !!peer_rate : peer_rate; in clk_rpm_unprepare()
243 sleep_rate = r->branch ? !!peer_sleep_rate : peer_sleep_rate; in clk_rpm_unprepare()
248 r->enabled = false; in clk_rpm_unprepare()
257 struct rpm_cc *rcc = r->rpm_cc; in clk_rpm_xo_prepare()
258 int ret, clk_id = r->rpm_clk_id; in clk_rpm_xo_prepare()
261 mutex_lock(&rcc->xo_lock); in clk_rpm_xo_prepare()
263 value = rcc->xo_buffer_value | (QCOM_RPM_XO_MODE_ON << r->xo_offset); in clk_rpm_xo_prepare()
264 ret = qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE, clk_id, &value, 1); in clk_rpm_xo_prepare()
266 r->enabled = true; in clk_rpm_xo_prepare()
267 rcc->xo_buffer_value = value; in clk_rpm_xo_prepare()
270 mutex_unlock(&rcc->xo_lock); in clk_rpm_xo_prepare()
278 struct rpm_cc *rcc = r->rpm_cc; in clk_rpm_xo_unprepare()
279 int ret, clk_id = r->rpm_clk_id; in clk_rpm_xo_unprepare()
282 mutex_lock(&rcc->xo_lock); in clk_rpm_xo_unprepare()
284 value = rcc->xo_buffer_value & ~(QCOM_RPM_XO_MODE_ON << r->xo_offset); in clk_rpm_xo_unprepare()
285 ret = qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE, clk_id, &value, 1); in clk_rpm_xo_unprepare()
287 r->enabled = false; in clk_rpm_xo_unprepare()
288 rcc->xo_buffer_value = value; in clk_rpm_xo_unprepare()
291 mutex_unlock(&rcc->xo_lock); in clk_rpm_xo_unprepare()
300 ret = qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE, in clk_rpm_fixed_prepare()
301 r->rpm_clk_id, &value, 1); in clk_rpm_fixed_prepare()
303 r->enabled = true; in clk_rpm_fixed_prepare()
314 ret = qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE, in clk_rpm_fixed_unprepare()
315 r->rpm_clk_id, &value, 1); in clk_rpm_fixed_unprepare()
317 r->enabled = false; in clk_rpm_fixed_unprepare()
324 struct clk_rpm *peer = r->peer; in clk_rpm_set_rate()
332 if (!r->enabled) in clk_rpm_set_rate()
338 if (peer->enabled) in clk_rpm_set_rate()
339 to_active_sleep(peer, peer->rate, in clk_rpm_set_rate()
352 r->rate = rate; in clk_rpm_set_rate()
364 * RPM handles rate rounding and we don't have a way to in clk_rpm_round_rate()
377 * RPM handles rate rounding and we don't have a way to in clk_rpm_recalc_rate()
381 return r->rate; in clk_rpm_recalc_rate()
509 { .compatible = "qcom,rpmcc-msm8660", .data = &rpm_clk_msm8660 },
510 { .compatible = "qcom,rpmcc-apq8060", .data = &rpm_clk_msm8660 },
511 { .compatible = "qcom,rpmcc-apq8064", .data = &rpm_clk_apq8064 },
512 { .compatible = "qcom,rpmcc-ipq806x", .data = &rpm_clk_ipq806x },
521 unsigned int idx = clkspec->args[0]; in qcom_rpm_clk_hw_get()
523 if (idx >= rcc->num_clks) { in qcom_rpm_clk_hw_get()
525 return ERR_PTR(-EINVAL); in qcom_rpm_clk_hw_get()
528 return rcc->clks[idx] ? &rcc->clks[idx]->hw : ERR_PTR(-ENOENT); in qcom_rpm_clk_hw_get()
536 struct qcom_rpm *rpm; in rpm_clk_probe() local
540 rpm = dev_get_drvdata(pdev->dev.parent); in rpm_clk_probe()
541 if (!rpm) { in rpm_clk_probe()
542 dev_err(&pdev->dev, "Unable to retrieve handle to RPM\n"); in rpm_clk_probe()
543 return -ENODEV; in rpm_clk_probe()
546 desc = of_device_get_match_data(&pdev->dev); in rpm_clk_probe()
548 return -EINVAL; in rpm_clk_probe()
550 rpm_clks = desc->clks; in rpm_clk_probe()
551 num_clks = desc->num_clks; in rpm_clk_probe()
553 rcc = devm_kzalloc(&pdev->dev, sizeof(*rcc), GFP_KERNEL); in rpm_clk_probe()
555 return -ENOMEM; in rpm_clk_probe()
557 rcc->clks = rpm_clks; in rpm_clk_probe()
558 rcc->num_clks = num_clks; in rpm_clk_probe()
559 mutex_init(&rcc->xo_lock); in rpm_clk_probe()
565 rpm_clks[i]->rpm = rpm; in rpm_clk_probe()
566 rpm_clks[i]->rpm_cc = rcc; in rpm_clk_probe()
577 ret = devm_clk_hw_register(&pdev->dev, &rpm_clks[i]->hw); in rpm_clk_probe()
582 ret = devm_of_clk_add_hw_provider(&pdev->dev, qcom_rpm_clk_hw_get, in rpm_clk_probe()
589 dev_err(&pdev->dev, "Error registering RPM Clock driver (%d)\n", ret); in rpm_clk_probe()
595 .name = "qcom-clk-rpm",
613 MODULE_DESCRIPTION("Qualcomm RPM Clock Controller Driver");
615 MODULE_ALIAS("platform:qcom-clk-rpm");