Lines Matching +full:protected +full:- +full:clocks
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
111 if (!core->rpm_enabled)
114 return pm_runtime_resume_and_get(core->dev);
119 if (!core->rpm_enabled)
122 pm_runtime_put_sync(core->dev);
146 if (--prepare_refcnt)
186 if (--enable_refcnt) {
196 return core->protect_count;
204 * .is_prepared is optional for clocks that can prepare
207 if (!core->ops->is_prepared)
208 return core->prepare_count;
211 ret = core->ops->is_prepared(core->hw);
223 * .is_enabled is only mandatory for clocks that gate
226 if (!core->ops->is_enabled)
227 return core->enable_count;
239 if (core->rpm_enabled) {
240 pm_runtime_get_noresume(core->dev);
241 if (!pm_runtime_active(core->dev)) {
252 if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent)
253 if (!clk_core_is_enabled(core->parent)) {
258 ret = core->ops->is_enabled(core->hw);
260 if (core->rpm_enabled)
261 pm_runtime_put(core->dev);
270 return !clk ? NULL : clk->core->name;
276 return hw->core->name;
282 return !clk ? NULL : clk->core->hw;
288 return hw->core->num_parents;
294 return hw->core->parent ? hw->core->parent->hw : NULL;
304 if (!strcmp(core->name, name))
307 hlist_for_each_entry(child, &core->children, child_node) {
351 return -ENOENT;
356 return ERR_PTR(-ENOENT);
361 * clk_core_get - Find the clk_core parent of a clk
368 * node's 'clock-names' property or as the 'con_id' matching the device's
373 * clock-controller@c001 that has a clk_init_data::parent_data array
375 * clock-controller@f00abcd without needing to get the globally unique name of
378 * parent: clock-controller@f00abcd {
380 * #clock-cells = <0>;
383 * clock-controller@c001 {
385 * clocks = <&parent>;
386 * clock-names = "xtal";
387 * #clock-cells = <1>;
390 * Returns: -ENOENT when the provider can't be found or the clk doesn't
398 const char *name = core->parents[p_index].fw_name;
399 int index = core->parents[p_index].index;
400 struct clk_hw *hw = ERR_PTR(-ENOENT);
401 struct device *dev = core->dev;
403 struct device_node *np = core->of_node;
421 return hw->core;
426 struct clk_parent_map *entry = &core->parents[index];
429 if (entry->hw) {
430 parent = entry->hw->core;
433 if (PTR_ERR(parent) == -ENOENT && entry->name)
434 parent = clk_core_lookup(entry->name);
443 parent = ERR_PTR(-EPROBE_DEFER);
447 entry->core = parent;
453 if (!core || index >= core->num_parents || !core->parents)
456 if (!core->parents[index].core)
459 return core->parents[index].core;
467 parent = clk_core_get_parent_by_index(hw->core, index);
469 return !parent ? NULL : parent->hw;
475 return !clk ? 0 : clk->core->enable_count;
483 if (!core->num_parents || core->parent)
484 return core->rate;
496 return clk_core_get_rate_nolock(hw->core);
505 return core->accuracy;
510 return hw->core->flags;
516 return clk_core_is_prepared(hw->core);
522 return clk_core_rate_is_protected(hw->core);
528 return clk_core_is_enabled(hw->core);
537 return clk_core_is_enabled(clk->core);
545 return abs(now - rate) < abs(best - rate);
563 if (core->parent == parent)
566 for (i = 0; i < core->num_parents; i++) {
590 if (req->min_rate < old_req->min_rate)
591 req->min_rate = old_req->min_rate;
593 if (req->max_rate > old_req->max_rate)
594 req->max_rate = old_req->max_rate;
601 struct clk_core *core = hw->core;
602 struct clk_core *parent = core->parent;
606 if (core->flags & CLK_SET_RATE_PARENT) {
610 req->rate = 0;
615 req->rate);
632 req->best_parent_rate = best;
633 req->rate = best;
642 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
647 if (core->flags & CLK_SET_RATE_NO_REPARENT)
651 num_parents = core->num_parents;
659 if (core->flags & CLK_SET_RATE_PARENT) {
662 clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate);
677 if (mux_is_better_rate(req->rate, parent_rate,
685 return -EINVAL;
687 req->best_parent_hw = best_parent->hw;
688 req->best_parent_rate = best;
689 req->rate = best;
699 return !core ? NULL : core->hw->clk;
710 *min_rate = core->min_rate;
711 *max_rate = core->max_rate;
713 hlist_for_each_entry(clk_user, &core->clks, clks_node)
714 *min_rate = max(*min_rate, clk_user->min_rate);
716 hlist_for_each_entry(clk_user, &core->clks, clks_node)
717 *max_rate = min(*max_rate, clk_user->max_rate);
721 * clk_hw_get_rate_range() - returns the clock rate range for a hw clk
732 clk_core_get_boundaries(hw->core, min_rate, max_rate);
744 if (min_rate > core->max_rate || max_rate < core->min_rate)
747 hlist_for_each_entry(user, &core->clks, clks_node)
748 if (min_rate > user->max_rate || max_rate < user->min_rate)
757 hw->core->min_rate = min_rate;
758 hw->core->max_rate = max_rate;
763 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
771 * Returns: 0 on success, -EERROR value on error
788 * clk_hw_determine_rate_no_reparent - clk_ops::determine_rate implementation for a clk that doesn't reparent
797 * Returns: 0 on success, -EERROR value on error
815 if (WARN(core->protect_count == 0,
816 "%s already unprotected\n", core->name))
819 if (--core->protect_count > 0)
822 clk_core_rate_unprotect(core->parent);
832 return -EINVAL;
834 if (core->protect_count == 0)
837 ret = core->protect_count;
838 core->protect_count = 1;
845 * clk_rate_exclusive_put - release exclusivity over clock rate control
850 * clock which could result in a rate change or rate glitch. Exclusive clocks
852 * further up the parent chain of clocks. As a result, clocks up parent chain
873 if (WARN_ON(clk->exclusive_count <= 0))
876 clk_core_rate_unprotect(clk->core);
877 clk->exclusive_count--;
890 if (core->protect_count == 0)
891 clk_core_rate_protect(core->parent);
893 core->protect_count++;
907 core->protect_count = count;
911 * clk_rate_exclusive_get - get exclusivity over the clk rate control
916 * clock which could result in a rate change or rate glitch. Exclusive clocks
918 * further up the parent chain of clocks. As a result, clocks up parent chain
926 * Returns 0 on success, -EERROR otherwise
934 clk_core_rate_protect(clk->core);
935 clk->exclusive_count++;
949 if (WARN(core->prepare_count == 0,
950 "%s already unprepared\n", core->name))
953 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
954 "Unpreparing critical %s\n", core->name))
957 if (core->flags & CLK_SET_RATE_GATE)
960 if (--core->prepare_count > 0)
963 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
967 if (core->ops->unprepare)
968 core->ops->unprepare(core->hw);
971 clk_core_unprepare(core->parent);
983 * clk_unprepare - undo preparation of a clock source
998 clk_core_unprepare_lock(clk->core);
1011 if (core->prepare_count == 0) {
1016 ret = clk_core_prepare(core->parent);
1022 if (core->ops->prepare)
1023 ret = core->ops->prepare(core->hw);
1031 core->prepare_count++;
1040 if (core->flags & CLK_SET_RATE_GATE)
1045 clk_core_unprepare(core->parent);
1063 * clk_prepare - prepare a clock source
1072 * Returns 0 on success, -EERROR otherwise.
1079 return clk_core_prepare_lock(clk->core);
1090 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
1093 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
1094 "Disabling critical %s\n", core->name))
1097 if (--core->enable_count > 0)
1102 if (core->ops->disable)
1103 core->ops->disable(core->hw);
1107 clk_core_disable(core->parent);
1120 * clk_disable - gate a clock
1126 * SoC-internal clk which is controlled via simple register writes. In the
1136 clk_core_disable_lock(clk->core);
1149 if (WARN(core->prepare_count == 0,
1150 "Enabling unprepared %s\n", core->name))
1151 return -ESHUTDOWN;
1153 if (core->enable_count == 0) {
1154 ret = clk_core_enable(core->parent);
1161 if (core->ops->enable)
1162 ret = core->ops->enable(core->hw);
1167 clk_core_disable(core->parent);
1172 core->enable_count++;
1189 * clk_gate_restore_context - restore context for poweroff
1193 * the gate clocks based on the enable_count. This is done in cases
1196 * helps restore the state of gate clocks.
1200 struct clk_core *core = hw->core;
1202 if (core->enable_count)
1203 core->ops->enable(hw);
1205 core->ops->disable(hw);
1214 hlist_for_each_entry(child, &core->children, child_node) {
1220 if (core->ops && core->ops->save_context)
1221 ret = core->ops->save_context(core->hw);
1230 if (core->ops && core->ops->restore_context)
1231 core->ops->restore_context(core->hw);
1233 hlist_for_each_entry(child, &core->children, child_node)
1238 * clk_save_context - save clock context for poweroff
1266 * clk_restore_context - restore clock context after poweroff
1284 * clk_enable - ungate a clock
1289 * if the operation will never sleep. One example is a SoC-internal clk which
1293 * must be called before clk_enable. Returns 0 on success, -EERROR
1301 return clk_core_enable_lock(clk->core);
1306 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it.
1310 * making clk_enable()/clk_disable() no-ops, false otherwise.
1322 return clk && !(clk->core->ops->enable && clk->core->ops->disable);
1353 hlist_for_each_entry(child, &core->children, child_node)
1356 if (core->prepare_count)
1359 if (core->flags & CLK_IGNORE_UNUSED)
1367 if (core->ops->unprepare_unused)
1368 core->ops->unprepare_unused(core->hw);
1369 else if (core->ops->unprepare)
1370 core->ops->unprepare(core->hw);
1384 hlist_for_each_entry(child, &core->children, child_node)
1387 if (core->flags & CLK_OPS_PARENT_ENABLE)
1388 clk_core_prepare_enable(core->parent);
1395 if (core->enable_count)
1398 if (core->flags & CLK_IGNORE_UNUSED)
1402 * some gate clocks have special needs during the disable-unused
1408 if (core->ops->disable_unused)
1409 core->ops->disable_unused(core->hw);
1410 else if (core->ops->disable)
1411 core->ops->disable(core->hw);
1419 if (core->flags & CLK_OPS_PARENT_ENABLE)
1420 clk_core_disable_unprepare(core->parent);
1436 pr_warn("clk: Not disabling unused clocks\n");
1440 pr_info("clk: Disabling unused clocks\n");
1473 * Some clock providers hand-craft their clk_rate_requests and
1480 if (!req->min_rate && !req->max_rate)
1482 __func__, core->name);
1484 req->rate = clamp(req->rate, req->min_rate, req->max_rate);
1488 * - if the provider is not protected at all
1489 * - if the calling consumer is the only one which has exclusivity
1493 req->rate = core->rate;
1494 } else if (core->ops->determine_rate) {
1495 return core->ops->determine_rate(core->hw, req);
1496 } else if (core->ops->round_rate) {
1497 rate = core->ops->round_rate(core->hw, req->rate,
1498 &req->best_parent_rate);
1502 req->rate = rate;
1504 return -EINVAL;
1520 req->max_rate = ULONG_MAX;
1525 req->core = core;
1526 req->rate = rate;
1527 clk_core_get_boundaries(core, &req->min_rate, &req->max_rate);
1529 parent = core->parent;
1531 req->best_parent_hw = parent->hw;
1532 req->best_parent_rate = parent->rate;
1534 req->best_parent_hw = NULL;
1535 req->best_parent_rate = 0;
1540 * clk_hw_init_rate_request - Initializes a clk_rate_request
1555 clk_core_init_rate_req(hw->core, req, rate);
1560 * clk_hw_forward_rate_request - Forwards a clk_rate_request to a clock's parent
1579 clk_core_forward_rate_req(hw->core, old_req,
1580 parent->core, req,
1587 return core->ops->determine_rate || core->ops->round_rate;
1598 req->rate = 0;
1605 if (core->flags & CLK_SET_RATE_PARENT) {
1608 clk_core_forward_rate_req(core, req, core->parent, &parent_req, req->rate);
1612 ret = clk_core_round_rate_nolock(core->parent, &parent_req);
1618 req->best_parent_rate = parent_req.rate;
1619 req->rate = parent_req.rate;
1624 req->rate = core->rate;
1629 * __clk_determine_rate - get the closest rate actually supported by a clock
1638 req->rate = 0;
1642 return clk_core_round_rate_nolock(hw->core, req);
1647 * clk_hw_round_rate() - round the given rate for a hw clk
1666 clk_core_init_rate_req(hw->core, &req, rate);
1670 ret = clk_core_round_rate_nolock(hw->core, &req);
1681 * clk_round_rate - round the given rate for a clk
1699 if (clk->exclusive_count)
1700 clk_core_rate_unprotect(clk->core);
1702 clk_core_init_rate_req(clk->core, &req, rate);
1706 ret = clk_core_round_rate_nolock(clk->core, &req);
1710 if (clk->exclusive_count)
1711 clk_core_rate_protect(clk->core);
1723 * __clk_notify - call clk notifier chain
1729 * Triggers a notifier call chain on the clk rate-change notification
1747 if (cn->clk->core == core) {
1748 cnd.clk = cn->clk;
1749 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1775 if (core->parent)
1776 parent_accuracy = core->parent->accuracy;
1778 if (core->ops->recalc_accuracy)
1779 core->accuracy = core->ops->recalc_accuracy(core->hw,
1782 core->accuracy = parent_accuracy;
1784 hlist_for_each_entry(child, &core->children, child_node)
1790 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1797 * clk_get_accuracy - return the accuracy of clk
1813 accuracy = clk_core_get_accuracy_recalc(clk->core);
1825 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1826 rate = core->ops->recalc_rate(core->hw, parent_rate);
1854 old_rate = core->rate;
1856 if (core->parent)
1857 parent_rate = core->parent->rate;
1859 core->rate = clk_recalc(core, parent_rate);
1861 core->req_rate = core->rate;
1867 if (core->notifier_count && msg)
1868 __clk_notify(core, msg, old_rate, core->rate);
1870 hlist_for_each_entry(child, &core->children, child_node)
1876 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1883 * clk_get_rate - return the rate of clk
1899 rate = clk_core_get_rate_recalc(clk->core);
1912 return -EINVAL;
1914 for (i = 0; i < core->num_parents; i++) {
1916 if (core->parents[i].core == parent)
1920 if (core->parents[i].core)
1924 if (core->parents[i].hw) {
1925 if (core->parents[i].hw == parent->hw)
1937 if (core->parents[i].name &&
1938 !strcmp(parent->name, core->parents[i].name))
1942 if (i == core->num_parents)
1943 return -EINVAL;
1945 core->parents[i].core = parent;
1950 * clk_hw_get_parent_index - return the index of the parent clock
1953 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1961 return -EINVAL;
1963 return clk_fetch_parent_index(hw->core, parent->core);
1974 core->orphan = is_orphan;
1976 hlist_for_each_entry(child, &core->children, child_node)
1982 bool was_orphan = core->orphan;
1984 hlist_del(&core->child_node);
1987 bool becomes_orphan = new_parent->orphan;
1990 if (new_parent->new_child == core)
1991 new_parent->new_child = NULL;
1993 hlist_add_head(&core->child_node, &new_parent->children);
1998 hlist_add_head(&core->child_node, &clk_orphan_list);
2003 core->parent = new_parent;
2010 struct clk_core *old_parent = core->parent;
2033 if (core->flags & CLK_OPS_PARENT_ENABLE) {
2039 if (core->prepare_count) {
2060 if (core->prepare_count) {
2065 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
2066 if (core->flags & CLK_OPS_PARENT_ENABLE) {
2084 if (parent && core->ops->set_parent)
2085 ret = core->ops->set_parent(core->hw, p_index);
2113 * pre-rate change notifications and returns early if no clks in the
2130 if (core->notifier_count)
2131 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
2135 __func__, core->name, ret);
2139 hlist_for_each_entry(child, &core->children, child_node) {
2154 core->new_rate = new_rate;
2155 core->new_parent = new_parent;
2156 core->new_parent_index = p_index;
2158 core->new_child = NULL;
2159 if (new_parent && new_parent != core->parent)
2160 new_parent->new_child = core;
2162 hlist_for_each_entry(child, &core->children, child_node) {
2163 child->new_rate = clk_recalc(child, new_rate);
2164 clk_calc_subtree(child, child->new_rate, NULL, 0);
2189 parent = old_parent = core->parent;
2191 best_parent_rate = parent->rate;
2211 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
2215 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
2216 /* pass-through clock without adjustable parent */
2217 core->new_rate = core->rate;
2220 /* pass-through clock with adjustable parent */
2222 new_rate = parent->new_rate;
2226 /* some clocks must be gated to change parent */
2228 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
2230 __func__, core->name);
2235 if (parent && core->num_parents > 1) {
2239 __func__, parent->name, core->name);
2244 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
2245 best_parent_rate != parent->rate)
2265 if (core->rate == core->new_rate)
2268 if (core->notifier_count) {
2269 ret = __clk_notify(core, event, core->rate, core->new_rate);
2274 hlist_for_each_entry(child, &core->children, child_node) {
2276 if (child->new_parent && child->new_parent != core)
2283 /* handle the new child who might not be in core->children yet */
2284 if (core->new_child) {
2285 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2307 old_rate = core->rate;
2309 if (core->new_parent) {
2310 parent = core->new_parent;
2311 best_parent_rate = core->new_parent->rate;
2312 } else if (core->parent) {
2313 parent = core->parent;
2314 best_parent_rate = core->parent->rate;
2320 if (core->flags & CLK_SET_RATE_UNGATE) {
2325 if (core->new_parent && core->new_parent != core->parent) {
2326 old_parent = __clk_set_parent_before(core, core->new_parent);
2327 trace_clk_set_parent(core, core->new_parent);
2329 if (core->ops->set_rate_and_parent) {
2331 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2333 core->new_parent_index);
2334 } else if (core->ops->set_parent) {
2335 core->ops->set_parent(core->hw, core->new_parent_index);
2338 trace_clk_set_parent_complete(core, core->new_parent);
2339 __clk_set_parent_after(core, core->new_parent, old_parent);
2342 if (core->flags & CLK_OPS_PARENT_ENABLE)
2345 trace_clk_set_rate(core, core->new_rate);
2347 if (!skip_set_rate && core->ops->set_rate)
2348 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
2350 trace_clk_set_rate_complete(core, core->new_rate);
2352 core->rate = clk_recalc(core, best_parent_rate);
2354 if (core->flags & CLK_SET_RATE_UNGATE) {
2359 if (core->flags & CLK_OPS_PARENT_ENABLE)
2362 if (core->notifier_count && old_rate != core->rate)
2363 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
2365 if (core->flags & CLK_RECALC_NEW_RATES)
2366 (void)clk_calc_new_rates(core, core->new_rate);
2372 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2374 if (child->new_parent && child->new_parent != core)
2379 /* handle the new child who might not be in core->children yet */
2380 if (core->new_child)
2381 clk_change_rate(core->new_child);
2432 /* fail on a direct rate set of a protected provider */
2434 return -EBUSY;
2439 return -EINVAL;
2449 fail_clk->name);
2451 ret = -EBUSY;
2458 core->req_rate = req_rate;
2466 * clk_set_rate - specify a new rate for clk
2482 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2484 * Returns 0 on success, -EERROR otherwise.
2496 if (clk->exclusive_count)
2497 clk_core_rate_unprotect(clk->core);
2499 ret = clk_core_set_rate_nolock(clk->core, rate);
2501 if (clk->exclusive_count)
2502 clk_core_rate_protect(clk->core);
2511 * clk_set_rate_exclusive - specify a new rate and get exclusive control
2527 * Returns 0 on success, -EERROR otherwise.
2545 ret = clk_core_set_rate_nolock(clk->core, rate);
2547 clk_core_rate_protect(clk->core);
2548 clk->exclusive_count++;
2569 trace_clk_set_rate_range(clk->core, min, max);
2573 __func__, clk->core->name, clk->dev_id, clk->con_id,
2575 return -EINVAL;
2578 if (clk->exclusive_count)
2579 clk_core_rate_unprotect(clk->core);
2582 old_min = clk->min_rate;
2583 old_max = clk->max_rate;
2584 clk->min_rate = min;
2585 clk->max_rate = max;
2587 if (!clk_core_check_boundaries(clk->core, min, max)) {
2588 ret = -EINVAL;
2592 rate = clk->core->req_rate;
2593 if (clk->core->flags & CLK_GET_RATE_NOCACHE)
2594 rate = clk_core_get_rate_recalc(clk->core);
2607 * broken, clock protected, etc) but also because:
2608 * - round_rate() was not favorable and fell on the wrong
2610 * - the determine_rate() callback does not really check for
2614 ret = clk_core_set_rate_nolock(clk->core, rate);
2617 clk->min_rate = old_min;
2618 clk->max_rate = old_max;
2622 if (clk->exclusive_count)
2623 clk_core_rate_protect(clk->core);
2629 * clk_set_rate_range - set a rate range for a clock source
2654 * clk_set_min_rate - set a minimum clock rate for a clock source
2665 trace_clk_set_min_rate(clk->core, rate);
2667 return clk_set_rate_range(clk, rate, clk->max_rate);
2672 * clk_set_max_rate - set a maximum clock rate for a clock source
2683 trace_clk_set_max_rate(clk->core, rate);
2685 return clk_set_rate_range(clk, clk->min_rate, rate);
2690 * clk_get_parent - return the parent of a clk
2693 * Simply returns clk->parent. Returns NULL if clk is NULL.
2703 /* TODO: Create a per-user clk and change callers to call clk_put */
2704 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2715 if (core->num_parents > 1 && core->ops->get_parent)
2716 index = core->ops->get_parent(core->hw);
2734 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2738 * clk_has_parent - check if a clock is a possible parent for another
2749 /* NULL clocks should be nops, so return success if either is NULL. */
2753 return clk_core_has_parent(clk->core, parent->core);
2769 if (core->parent == parent)
2772 /* verify ops for multi-parent clks */
2773 if (core->num_parents > 1 && !core->ops->set_parent)
2774 return -EPERM;
2776 /* check that we are allowed to re-parent if the clock is in use */
2777 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2778 return -EBUSY;
2781 return -EBUSY;
2788 __func__, parent->name, core->name);
2791 p_rate = parent->rate;
2805 /* do the re-parent */
2824 return clk_core_set_parent_nolock(hw->core, parent->core);
2829 * clk_set_parent - switch the parent of a mux clk
2833 * Re-parent clk to use parent as its new input source. If clk is in
2843 * Returns 0 on success, -EERROR otherwise.
2854 if (clk->exclusive_count)
2855 clk_core_rate_unprotect(clk->core);
2857 ret = clk_core_set_parent_nolock(clk->core,
2858 parent ? parent->core : NULL);
2860 if (clk->exclusive_count)
2861 clk_core_rate_protect(clk->core);
2871 int ret = -EINVAL;
2879 return -EBUSY;
2883 if (core->ops->set_phase) {
2884 ret = core->ops->set_phase(core->hw, degrees);
2886 core->phase = degrees;
2895 * clk_set_phase - adjust the phase shift of a clock signal
2900 * degrees. Returns 0 on success, -EERROR otherwise.
2904 * phase locked-loop clock signal generators we may shift phase with
2928 if (clk->exclusive_count)
2929 clk_core_rate_unprotect(clk->core);
2931 ret = clk_core_set_phase_nolock(clk->core, degrees);
2933 if (clk->exclusive_count)
2934 clk_core_rate_protect(clk->core);
2947 if (!core->ops->get_phase)
2951 ret = core->ops->get_phase(core->hw);
2953 core->phase = ret;
2959 * clk_get_phase - return the phase shift of a clock signal
2963 * -EERROR.
2973 ret = clk_core_get_phase(clk->core);
2983 core->duty.num = 1;
2984 core->duty.den = 2;
2991 struct clk_duty *duty = &core->duty;
2994 if (!core->ops->get_duty_cycle)
2997 ret = core->ops->get_duty_cycle(core->hw, duty);
3002 if (duty->den == 0 || duty->num > duty->den) {
3003 ret = -EINVAL;
3018 if (core->parent &&
3019 core->flags & CLK_DUTY_CYCLE_PARENT) {
3020 ret = clk_core_update_duty_cycle_nolock(core->parent);
3021 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
3040 return -EBUSY;
3044 if (!core->ops->set_duty_cycle)
3047 ret = core->ops->set_duty_cycle(core->hw, duty);
3049 memcpy(&core->duty, duty, sizeof(*duty));
3061 if (core->parent &&
3062 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
3063 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
3064 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
3071 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
3091 return -EINVAL;
3098 if (clk->exclusive_count)
3099 clk_core_rate_unprotect(clk->core);
3101 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
3103 if (clk->exclusive_count)
3104 clk_core_rate_protect(clk->core);
3115 struct clk_duty *duty = &core->duty;
3122 ret = mult_frac(scale, duty->num, duty->den);
3130 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
3142 return clk_core_get_scaled_duty_cycle(clk->core, scale);
3147 * clk_is_match - check if two clk's point to the same hardware clock
3163 /* true if clk->core pointers match. Avoid dereferencing garbage */
3165 if (p->core == q->core)
3194 seq_printf(s, "%*s%-*s %-7d %-8d %-8d %-11lu %-10lu ",
3196 35 - level * 3, c->name,
3197 c->enable_count, c->prepare_count, c->protect_count,
3203 seq_printf(s, "%-5d", phase);
3205 seq_puts(s, "-----");
3207 seq_printf(s, " %-6d", clk_core_get_scaled_duty_cycle(c, 100000));
3209 if (c->ops->is_enabled)
3211 else if (!c->ops->enable)
3216 hlist_for_each_entry(clk_user, &c->clks, clks_node) {
3217 seq_printf(s, "%*s%-*s %-25s\n",
3220 clk_user->dev_id ? clk_user->dev_id : "deviceless",
3221 clk_user->con_id ? clk_user->con_id : "no_connection_id");
3237 hlist_for_each_entry(child, &c->children, child_node)
3244 struct hlist_head **lists = s->private;
3248 seq_puts(s, "---------------------------------------------------------------------------------------------------------------------------------------------\n");
3271 seq_printf(s, "\"%s\": { ", c->name);
3272 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
3273 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
3274 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
3292 hlist_for_each_entry(child, &c->children, child_node) {
3304 struct hlist_head **lists = s->private;
3367 ret = clk_prepare_enable(core->hw->clk);
3369 clk_disable_unprepare(core->hw->clk);
3378 *val = core->enable_count && core->prepare_count;
3410 *val = core->phase;
3438 struct clk_core *core = s->private;
3439 unsigned long flags = core->flags;
3469 * 4. Fetch parent clock's clock-output-name if DT index was set
3477 seq_puts(s, parent->name);
3478 } else if (core->parents[i].name) {
3479 seq_puts(s, core->parents[i].name);
3480 } else if (core->parents[i].fw_name) {
3481 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3483 if (core->parents[i].index >= 0)
3484 name = of_clk_get_parent_name(core->of_node, core->parents[i].index);
3496 struct clk_core *core = s->private;
3499 for (i = 0; i < core->num_parents - 1; i++)
3510 struct clk_core *core = s->private;
3512 if (core->parent)
3513 seq_printf(s, "%s\n", core->parent->name);
3523 struct seq_file *s = file->private_data;
3524 struct clk_core *core = s->private;
3535 return -ENOENT;
3557 struct clk_core *core = s->private;
3558 struct clk_duty *duty = &core->duty;
3560 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3568 struct clk_core *core = s->private;
3582 struct clk_core *core = s->private;
3601 root = debugfs_create_dir(core->name, pdentry);
3602 core->dentry = root;
3608 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3612 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3613 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3614 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3615 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
3622 if (core->num_parents > 1)
3627 if (core->num_parents > 0)
3631 if (core->num_parents > 1)
3635 if (core->ops->debug_init)
3636 core->ops->debug_init(core->hw, core->dentry);
3640 * clk_debug_register - add a clk node to the debugfs clk directory
3650 hlist_add_head(&core->debug_node, &clk_debug_list);
3657 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3661 * debugfs clk directory if clk->dentry points to debugfs created by
3667 hlist_del_init(&core->debug_node);
3668 debugfs_remove_recursive(core->dentry);
3669 core->dentry = NULL;
3674 * clk_debug_init - lazily populate the debugfs clk directory
3678 * populates the debugfs clk directory once at boot-time when we know that
3679 * debugfs is setup. It should only be called once at boot-time, all other clks
3738 * walk the list of orphan clocks and reparent any that newly finds a
3747 * clock. This is important for CLK_IS_CRITICAL clocks, which
3765 * 'req_rate' is set to something non-zero so that
3768 orphan->req_rate = orphan->rate;
3774 * __clk_core_init - initialize the data structures in a struct clk_core
3790 * Set hw->core after grabbing the prepare_lock to synchronize with
3791 * callers of clk_core_fill_parent_index() where we treat hw->core
3795 core->hw->core = core;
3802 if (clk_core_lookup(core->name)) {
3804 __func__, core->name);
3805 ret = -EEXIST;
3809 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
3810 if (core->ops->set_rate &&
3811 !((core->ops->round_rate || core->ops->determine_rate) &&
3812 core->ops->recalc_rate)) {
3814 __func__, core->name);
3815 ret = -EINVAL;
3819 if (core->ops->set_parent && !core->ops->get_parent) {
3821 __func__, core->name);
3822 ret = -EINVAL;
3826 if (core->ops->set_parent && !core->ops->determine_rate) {
3828 __func__, core->name);
3829 ret = -EINVAL;
3833 if (core->num_parents > 1 && !core->ops->get_parent) {
3835 __func__, core->name);
3836 ret = -EINVAL;
3840 if (core->ops->set_rate_and_parent &&
3841 !(core->ops->set_parent && core->ops->set_rate)) {
3843 __func__, core->name);
3844 ret = -EINVAL;
3849 * optional platform-specific magic
3862 if (core->ops->init) {
3863 ret = core->ops->init(core->hw);
3868 parent = core->parent = __clk_init_parent(core);
3871 * Populate core->parent if parent has already been clk_core_init'd. If
3877 * clocks and re-parent any that are children of the clock currently
3881 hlist_add_head(&core->child_node, &parent->children);
3882 core->orphan = parent->orphan;
3883 } else if (!core->num_parents) {
3884 hlist_add_head(&core->child_node, &clk_root_list);
3885 core->orphan = false;
3887 hlist_add_head(&core->child_node, &clk_orphan_list);
3888 core->orphan = true;
3893 * .recalc_accuracy. For simple clocks and lazy developers the default
3898 if (core->ops->recalc_accuracy)
3899 core->accuracy = core->ops->recalc_accuracy(core->hw,
3902 core->accuracy = parent->accuracy;
3904 core->accuracy = 0;
3915 core->name);
3926 * simple clocks and lazy developers the default fallback is to use the
3930 if (core->ops->recalc_rate)
3931 rate = core->ops->recalc_rate(core->hw,
3934 rate = parent->rate;
3937 core->rate = core->req_rate = rate;
3940 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3942 * reparenting clocks
3944 if (core->flags & CLK_IS_CRITICAL) {
3948 __func__, core->name);
3955 __func__, core->name);
3963 kref_init(&core->ref);
3968 hlist_del_init(&core->child_node);
3969 core->hw->core = NULL;
3981 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3988 hlist_add_head(&clk->clks_node, &core->clks);
3993 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3999 hlist_del(&clk->clks_node);
4003 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
4017 return ERR_PTR(-ENOMEM);
4019 clk->core = core;
4020 clk->dev_id = dev_id;
4021 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
4022 clk->max_rate = ULONG_MAX;
4028 * free_clk - Free a clk consumer
4036 kfree_const(clk->con_id);
4062 core = hw->core;
4066 clk->dev = dev;
4068 if (!try_module_get(core->owner)) {
4070 return ERR_PTR(-ENOENT);
4073 kref_get(&core->ref);
4080 * clk_hw_get_clk - get clk consumer given an clk_hw
4091 struct device *dev = hw->core->dev;
4104 return -EINVAL;
4110 return -ENOMEM;
4118 u8 num_parents = init->num_parents;
4119 const char * const *parent_names = init->parent_names;
4120 const struct clk_hw **parent_hws = init->parent_hws;
4121 const struct clk_parent_data *parent_data = init->parent_data;
4129 * Avoid unnecessary string look-ups of clk_core's possible parents by
4133 core->parents = parents;
4135 return -ENOMEM;
4139 parent->index = -1;
4144 __func__, core->name);
4145 ret = clk_cpy_name(&parent->name, parent_names[i],
4148 parent->hw = parent_data[i].hw;
4149 parent->index = parent_data[i].index;
4150 ret = clk_cpy_name(&parent->fw_name,
4153 ret = clk_cpy_name(&parent->name,
4157 parent->hw = parent_hws[i];
4159 ret = -EINVAL;
4167 } while (--i >= 0);
4179 int i = core->num_parents;
4181 if (!core->num_parents)
4184 while (--i >= 0) {
4185 kfree_const(core->parents[i].name);
4186 kfree_const(core->parents[i].fw_name);
4189 kfree(core->parents);
4197 const struct clk_init_data *init = hw->init;
4202 * we catch use of hw->init early on in the core.
4204 hw->init = NULL;
4208 ret = -ENOMEM;
4212 core->name = kstrdup_const(init->name, GFP_KERNEL);
4213 if (!core->name) {
4214 ret = -ENOMEM;
4218 if (WARN_ON(!init->ops)) {
4219 ret = -EINVAL;
4222 core->ops = init->ops;
4225 core->rpm_enabled = true;
4226 core->dev = dev;
4227 core->of_node = np;
4228 if (dev && dev->driver)
4229 core->owner = dev->driver->owner;
4230 core->hw = hw;
4231 core->flags = init->flags;
4232 core->num_parents = init->num_parents;
4233 core->min_rate = 0;
4234 core->max_rate = ULONG_MAX;
4240 INIT_HLIST_HEAD(&core->clks);
4246 hw->clk = alloc_clk(core, NULL, NULL);
4247 if (IS_ERR(hw->clk)) {
4248 ret = PTR_ERR(hw->clk);
4252 clk_core_link_consumer(core, hw->clk);
4256 return hw->clk;
4259 clk_core_unlink_consumer(hw->clk);
4262 free_clk(hw->clk);
4263 hw->clk = NULL;
4269 kfree_const(core->name);
4277 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
4281 * @dev->parent if dev doesn't have a device node, or NULL if neither
4282 * @dev or @dev->parent have a device node.
4293 np = dev_of_node(dev->parent);
4299 * clk_register - allocate a new clock, register it and return an opaque cookie
4301 * @hw: link to hardware-specific clock data
4318 * clk_hw_register - register a clk_hw and return an error code
4320 * @hw: link to hardware-specific clock data
4335 * of_clk_hw_register - register a clk_hw and return an error code
4337 * @hw: link to hardware-specific clock data
4359 kfree_const(core->name);
4364 * Empty clk_ops for unregistered clocks. These are used temporarily
4370 return -ENXIO;
4381 return -ENXIO;
4386 return -ENXIO;
4392 return -ENXIO;
4411 for (i = 0; i < root->num_parents; i++)
4412 if (root->parents[i].core == target)
4413 root->parents[i].core = NULL;
4415 hlist_for_each_entry(child, &root->children, child_node)
4434 * clk_unregister - unregister a currently registered clock
4445 clk_debug_unregister(clk->core);
4449 ops = clk->core->ops;
4452 clk->core->name);
4460 clk->core->ops = &clk_nodrv_ops;
4463 if (ops->terminate)
4464 ops->terminate(clk->core->hw);
4466 if (!hlist_empty(&clk->core->children)) {
4471 hlist_for_each_entry_safe(child, t, &clk->core->children,
4476 clk_core_evict_parent_cache(clk->core);
4478 hlist_del_init(&clk->core->child_node);
4480 if (clk->core->prepare_count)
4482 __func__, clk->core->name);
4484 if (clk->core->protect_count)
4485 pr_warn("%s: unregistering protected clock: %s\n",
4486 __func__, clk->core->name);
4488 kref_put(&clk->core->ref, __clk_release);
4496 * clk_hw_unregister - unregister a currently registered clk_hw
4497 * @hw: hardware-specific clock data to unregister
4501 clk_unregister(hw->clk);
4516 * devm_clk_register - resource managed clk_register()
4518 * @hw: link to hardware-specific clock data
4522 * Clocks returned from this function are automatically clk_unregister()ed on
4532 return ERR_PTR(-ENOMEM);
4547 * devm_clk_hw_register - resource managed clk_hw_register()
4549 * @hw: link to hardware-specific clock data
4551 * Managed clk_hw_register(). Clocks registered by this function are
4562 return -ENOMEM;
4582 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()
4587 * Managed clk_hw_get_clk(). Clocks got with this function are
4601 WARN_ON_ONCE(dev != hw->core->dev);
4605 return ERR_PTR(-ENOMEM);
4637 if (WARN_ON(clk->exclusive_count)) {
4639 clk->core->protect_count -= (clk->exclusive_count - 1);
4640 clk_core_rate_unprotect(clk->core);
4641 clk->exclusive_count = 0;
4644 hlist_del(&clk->clks_node);
4647 if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX)
4650 owner = clk->core->owner;
4651 kref_put(&clk->core->ref, __clk_release);
4663 * clk_notifier_register - add a clk rate change notifier
4670 * re-enter into the clk framework by calling any top-level clk APIs;
4677 * clk_notifier_register() must be called from non-atomic context.
4678 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4685 int ret = -ENOMEM;
4688 return -EINVAL;
4694 if (cn->clk == clk)
4702 cn->clk = clk;
4703 srcu_init_notifier_head(&cn->notifier_head);
4705 list_add(&cn->node, &clk_notifier_list);
4708 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4710 clk->core->notifier_count++;
4720 * clk_notifier_unregister - remove a clk rate change notifier
4727 * Returns -EINVAL if called with null arguments; otherwise, passes
4733 int ret = -ENOENT;
4736 return -EINVAL;
4741 if (cn->clk == clk) {
4742 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4744 clk->core->notifier_count--;
4747 if (!cn->notifier_head.head) {
4748 srcu_cleanup_notifier_head(&cn->notifier_head);
4749 list_del(&cn->node);
4771 clk_notifier_unregister(devres->clk, devres->nb);
4784 return -ENOMEM;
4788 devres->clk = clk;
4789 devres->nb = nb;
4808 * struct of_clk_provider - Clock provider registration structure
4849 unsigned int idx = clkspec->args[0];
4851 if (idx >= clk_data->clk_num) {
4853 return ERR_PTR(-EINVAL);
4856 return clk_data->clks[idx];
4864 unsigned int idx = clkspec->args[0];
4866 if (idx >= hw_data->num) {
4868 return ERR_PTR(-EINVAL);
4871 return hw_data->hws[idx];
4876 * of_clk_add_provider() - Register a clock provider for a node
4896 return -ENOMEM;
4898 cp->node = of_node_get(np);
4899 cp->data = data;
4900 cp->get = clk_src_get;
4903 list_add(&cp->link, &of_clk_providers);
4913 fwnode_dev_initialized(&np->fwnode, true);
4920 * of_clk_add_hw_provider() - Register a clock provider for a node
4938 return -ENOMEM;
4940 cp->node = of_node_get(np);
4941 cp->data = data;
4942 cp->get_hw = get;
4945 list_add(&cp->link, &of_clk_providers);
4955 fwnode_dev_initialized(&np->fwnode, true);
4968 * for cases like MFD sub-devices where the child device driver wants to use
4969 * devm_*() APIs but not list the device in DT as a sub-node.
4975 np = dev->of_node;
4976 parent_np = dev->parent ? dev->parent->of_node : NULL;
4978 if (!of_property_present(np, "#clock-cells"))
4979 if (of_property_present(parent_np, "#clock-cells"))
4986 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4992 * node or if the device node lacks of clock provider information (#clock-cells)
4994 * has the #clock-cells then it is used in registration. Provider is
5010 return -ENOMEM;
5026 * of_clk_del_provider() - Remove a previously registered clock provider
5038 if (cp->node == np) {
5039 list_del(&cp->link);
5040 fwnode_dev_initialized(&np->fwnode, false);
5041 of_node_put(cp->node);
5051 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
5057 * Parses a device node's "clocks" and "clock-names" properties to find the
5060 * parsing error. The @index argument is ignored if @name is non-NULL.
5064 * phandle1: clock-controller@1 {
5065 * #clock-cells = <2>;
5068 * phandle2: clock-controller@2 {
5069 * #clock-cells = <1>;
5072 * clock-consumer@3 {
5073 * clocks = <&phandle1 1 2 &phandle2 3>;
5074 * clock-names = "name1", "name2";
5077 * To get a device_node for `clock-controller@2' node you may call this
5080 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
5081 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
5082 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
5084 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
5085 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
5086 * the "clock-names" property of @np.
5091 int ret = -ENOENT;
5096 * For named clocks, first look up the name in the
5097 * "clock-names" property. If it cannot be found, then index
5099 * return -EINVAL.
5102 index = of_property_match_string(np, "clock-names", name);
5103 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
5112 * has a "clock-ranges" property, then we can try one of its
5113 * clocks.
5115 np = np->parent;
5116 if (np && !of_get_property(np, "clock-ranges", NULL))
5130 if (provider->get_hw)
5131 return provider->get_hw(clkspec, provider->data);
5133 clk = provider->get(clkspec, provider->data);
5143 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
5146 return ERR_PTR(-EINVAL);
5150 if (provider->node == clkspec->np) {
5162 * of_clk_get_from_provider() - Lookup a clock from a clock provider
5205 return __of_clk_get(np, index, np->full_name, NULL);
5210 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
5214 * This function parses the clocks and clock-names properties,
5221 return ERR_PTR(-ENOENT);
5223 return __of_clk_get(np, 0, np->full_name, name);
5228 * of_clk_get_parent_count() - Count the number of clocks a device node has
5231 * Returns: The number of clocks that are possible parents of this node
5237 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
5256 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
5265 * specified into an array offset for the clock-output-names property.
5267 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
5274 /* We went off the end of 'clock-indices' without finding it */
5278 if (of_property_read_string_index(clkspec.np, "clock-output-names",
5285 * the clock as long as #clock-cells = 0.
5290 clk_name = clkspec.np->name;
5306 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
5352 if (PTR_ERR(clk) == -EPROBE_DEFER)
5368 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
5371 * @flags: pointer to top-level framework flags
5373 * Detects if the clock-critical property exists and, if so, sets the
5377 * bindings, such as the one-clock-per-node style that are outdated.
5393 return -EINVAL;
5395 of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
5403 * of_clk_init() - Scan and init clock providers from the DT
5422 /* First prepare the list of the clocks providers */
5433 list_del(&clk_provider->node);
5434 of_node_put(clk_provider->np);
5441 parent->clk_init_cb = match->data;
5442 parent->np = of_node_get(np);
5443 list_add_tail(&parent->node, &clk_provider_list);
5450 if (force || parent_ready(clk_provider->np)) {
5453 of_node_set_flag(clk_provider->np,
5456 clk_provider->clk_init_cb(clk_provider->np);
5457 of_clk_set_defaults(clk_provider->np, true);
5459 list_del(&clk_provider->node);
5460 of_node_put(clk_provider->np);