1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
21 #include <linux/hwmon-sysfs.h>
25 #define DRV_NAME "ahci-imx"
28 	/* Timer 1-ms Register */
36 	IMX_P0PHYCR_CR_CAP_ADDR			= 1 << 16,
61 	IMX8QM_LPCG_PHYX2_PCLK0_MASK		= (0x3 << 16),
114 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
138 	} while (--timeout);  in imx_phy_crbit_assert()
140 	return timeout ? 0 : -ETIMEDOUT;  in imx_phy_crbit_assert()
228 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in imx_sata_phy_reset()
229 	void __iomem *mmio = hpriv->mmio;  in imx_sata_phy_reset()
234 	if (imxpriv->type == AHCI_IMX6QP) {  in imx_sata_phy_reset()
236 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5,  in imx_sata_phy_reset()
239 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5,  in imx_sata_phy_reset()
242 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5,  in imx_sata_phy_reset()
267 	} while (--timeout);  in imx_sata_phy_reset()
269 	return timeout ? 0 : -ETIMEDOUT;  in imx_sata_phy_reset()
337 	void __iomem *mmio = hpriv->mmio;  in __sata_ahci_read_temperature()
339 	/* check rd-wr to reg */  in __sata_ahci_read_temperature()
414 	a = (m2 - m1) / (m2/1000);  in __sata_ahci_read_temperature()
415 	*temp = ((-559) * a * a) / 1000 + (1379) * a + (-458000);  in __sata_ahci_read_temperature()
455 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in imx8_sata_enable()
456 	struct device *dev = &imxpriv->ahci_pdev->dev;  in imx8_sata_enable()
459 	ret = clk_prepare_enable(imxpriv->phy_pclk0);  in imx8_sata_enable()
464 	ret = clk_prepare_enable(imxpriv->phy_pclk1);  in imx8_sata_enable()
469 	ret = clk_prepare_enable(imxpriv->epcs_tx_clk);  in imx8_sata_enable()
474 	ret = clk_prepare_enable(imxpriv->epcs_rx_clk);  in imx8_sata_enable()
479 	ret = clk_prepare_enable(imxpriv->phy_apbclk);  in imx8_sata_enable()
485 	regmap_read(imxpriv->gpr, IMX8QM_CSR_PCIEA_OFFSET +  in imx8_sata_enable()
489 		regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
496 	regmap_read(imxpriv->gpr, IMX8QM_CSR_PCIEB_OFFSET +  in imx8_sata_enable()
500 		regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
509 		regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
518 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
522 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
528 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
537 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
541 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
545 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
558 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
570 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
575 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
580 	/* CTRL RST: SET -> delay 1 us -> CLEAR -> SET */  in imx8_sata_enable()
581 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
586 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
590 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
596 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
604 		regmap_read(imxpriv->gpr, reg, &val);  in imx8_sata_enable()
613 		ret = -ENODEV;  in imx8_sata_enable()
615 		writeb(imxpriv->imped_ratio, imxpriv->phy_base +  in imx8_sata_enable()
617 		writeb(imxpriv->imped_ratio, imxpriv->phy_base +  in imx8_sata_enable()
619 		reg = readb(imxpriv->phy_base +  in imx8_sata_enable()
621 		if (unlikely(reg != imxpriv->imped_ratio))  in imx8_sata_enable()
623 		reg = readb(imxpriv->phy_base +  in imx8_sata_enable()
625 		if (unlikely(reg != imxpriv->imped_ratio))  in imx8_sata_enable()
633 		clk_disable_unprepare(imxpriv->phy_apbclk);  in imx8_sata_enable()
634 		clk_disable_unprepare(imxpriv->phy_pclk1);  in imx8_sata_enable()
635 		clk_disable_unprepare(imxpriv->phy_pclk0);  in imx8_sata_enable()
639 	clk_disable_unprepare(imxpriv->phy_apbclk);  in imx8_sata_enable()
641 	clk_disable_unprepare(imxpriv->epcs_rx_clk);  in imx8_sata_enable()
643 	clk_disable_unprepare(imxpriv->epcs_tx_clk);  in imx8_sata_enable()
645 	clk_disable_unprepare(imxpriv->phy_pclk1);  in imx8_sata_enable()
647 	clk_disable_unprepare(imxpriv->phy_pclk0);  in imx8_sata_enable()
654 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in imx_sata_enable()
655 	struct device *dev = &imxpriv->ahci_pdev->dev;  in imx_sata_enable()
658 	if (imxpriv->no_device)  in imx_sata_enable()
665 	ret = clk_prepare_enable(imxpriv->sata_ref_clk);  in imx_sata_enable()
669 	if (imxpriv->type == AHCI_IMX6Q || imxpriv->type == AHCI_IMX6QP) {  in imx_sata_enable()
676 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,  in imx_sata_enable()
687 				   imxpriv->phy_params);  in imx_sata_enable()
688 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,  in imx_sata_enable()
699 	} else if (imxpriv->type == AHCI_IMX8QM) {  in imx_sata_enable()
708 	clk_disable_unprepare(imxpriv->sata_ref_clk);  in imx_sata_enable()
717 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in imx_sata_disable()
719 	if (imxpriv->no_device)  in imx_sata_disable()
722 	switch (imxpriv->type) {  in imx_sata_disable()
724 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5,  in imx_sata_disable()
727 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,  in imx_sata_disable()
733 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,  in imx_sata_disable()
739 		clk_disable_unprepare(imxpriv->epcs_rx_clk);  in imx_sata_disable()
740 		clk_disable_unprepare(imxpriv->epcs_tx_clk);  in imx_sata_disable()
747 	clk_disable_unprepare(imxpriv->sata_ref_clk);  in imx_sata_disable()
756 	struct ata_host *host = dev_get_drvdata(ap->dev);  in ahci_imx_error_handler()
757 	struct ahci_host_priv *hpriv = host->private_data;  in ahci_imx_error_handler()
758 	void __iomem *mmio = hpriv->mmio;  in ahci_imx_error_handler()
759 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in ahci_imx_error_handler()
763 	if (!(imxpriv->first_time) || ahci_imx_hotplug)  in ahci_imx_error_handler()
766 	imxpriv->first_time = false;  in ahci_imx_error_handler()
768 	ata_for_each_dev(dev, &ap->link, ENABLED)  in ahci_imx_error_handler()
778 	imxpriv->no_device = true;  in ahci_imx_error_handler()
780 	dev_info(ap->dev, "no device found, disabling link.\n");  in ahci_imx_error_handler()
781 	dev_info(ap->dev, "pass " MODULE_PARAM_PREFIX ".hotplug=1 to enable hotplug\n");  in ahci_imx_error_handler()
787 	struct ata_port *ap = link->ap;  in ahci_imx_softreset()
788 	struct ata_host *host = dev_get_drvdata(ap->dev);  in ahci_imx_softreset()
789 	struct ahci_host_priv *hpriv = host->private_data;  in ahci_imx_softreset()
790 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in ahci_imx_softreset()
793 	if (imxpriv->type == AHCI_IMX53)  in ahci_imx_softreset()
816 	{ .compatible = "fsl,imx53-ahci", .data = (void *)AHCI_IMX53 },
817 	{ .compatible = "fsl,imx6q-ahci", .data = (void *)AHCI_IMX6Q },
818 	{ .compatible = "fsl,imx6qp-ahci", .data = (void *)AHCI_IMX6QP },
819 	{ .compatible = "fsl,imx8qm-ahci", .data = (void *)AHCI_IMX8QM },
897 	{ 16, IMX6Q_GPR13_SATA_TX_ATTEN_16_16 },
913 		.name = "fsl,transmit-level-mV",
918 		.name = "fsl,transmit-boost-mdB",
923 		.name = "fsl,transmit-atten-16ths",
928 		.name = "fsl,receive-eq-mdB",
933 		.name = "fsl,no-spread-spectrum",
942 	struct device_node *np = dev->of_node;  in imx_ahci_parse_props()
949 		if (prop->num_values == 0) {  in imx_ahci_parse_props()
950 			if (of_property_read_bool(np, prop->name))  in imx_ahci_parse_props()
951 				reg_value |= prop->set_value;  in imx_ahci_parse_props()
953 				reg_value |= prop->def_value;  in imx_ahci_parse_props()
957 		if (of_property_read_u32(np, prop->name, &of_val)) {  in imx_ahci_parse_props()
959 				prop->name, prop->def_value);  in imx_ahci_parse_props()
960 			reg_value |= prop->def_value;  in imx_ahci_parse_props()
964 		for (j = 0; j < prop->num_values; j++) {  in imx_ahci_parse_props()
965 			if (prop->values[j].of_value == of_val) {  in imx_ahci_parse_props()
967 					prop->name, of_val, prop->values[j].reg_value);  in imx_ahci_parse_props()
968 				reg_value |= prop->values[j].reg_value;  in imx_ahci_parse_props()
973 		if (j == prop->num_values) {  in imx_ahci_parse_props()
975 				prop->name);  in imx_ahci_parse_props()
976 			reg_value |= prop->def_value;  in imx_ahci_parse_props()
990 	struct platform_device *pdev = imxpriv->ahci_pdev;  in imx8_sata_probe()
991 	struct device_node *np = dev->of_node;  in imx8_sata_probe()
993 	if (of_property_read_u32(np, "fsl,phy-imp", &imxpriv->imped_ratio))  in imx8_sata_probe()
994 		imxpriv->imped_ratio = IMX8QM_SATA_PHY_IMPED_RATIO_85OHM;  in imx8_sata_probe()
997 		imxpriv->phy_base = devm_ioremap(dev, phy_res->start,  in imx8_sata_probe()
999 		if (!imxpriv->phy_base) {  in imx8_sata_probe()
1001 			return -ENOMEM;  in imx8_sata_probe()
1005 		return -ENOMEM;  in imx8_sata_probe()
1007 	imxpriv->gpr =  in imx8_sata_probe()
1009 	if (IS_ERR(imxpriv->gpr)) {  in imx8_sata_probe()
1011 		return PTR_ERR(imxpriv->gpr);  in imx8_sata_probe()
1014 	imxpriv->epcs_tx_clk = devm_clk_get(dev, "epcs_tx");  in imx8_sata_probe()
1015 	if (IS_ERR(imxpriv->epcs_tx_clk)) {  in imx8_sata_probe()
1017 		return PTR_ERR(imxpriv->epcs_tx_clk);  in imx8_sata_probe()
1019 	imxpriv->epcs_rx_clk = devm_clk_get(dev, "epcs_rx");  in imx8_sata_probe()
1020 	if (IS_ERR(imxpriv->epcs_rx_clk)) {  in imx8_sata_probe()
1022 		return PTR_ERR(imxpriv->epcs_rx_clk);  in imx8_sata_probe()
1024 	imxpriv->phy_pclk0 = devm_clk_get(dev, "phy_pclk0");  in imx8_sata_probe()
1025 	if (IS_ERR(imxpriv->phy_pclk0)) {  in imx8_sata_probe()
1027 		return PTR_ERR(imxpriv->phy_pclk0);  in imx8_sata_probe()
1029 	imxpriv->phy_pclk1 = devm_clk_get(dev, "phy_pclk1");  in imx8_sata_probe()
1030 	if (IS_ERR(imxpriv->phy_pclk1)) {  in imx8_sata_probe()
1032 		return PTR_ERR(imxpriv->phy_pclk1);  in imx8_sata_probe()
1034 	imxpriv->phy_apbclk = devm_clk_get(dev, "phy_apbclk");  in imx8_sata_probe()
1035 	if (IS_ERR(imxpriv->phy_apbclk)) {  in imx8_sata_probe()
1037 		return PTR_ERR(imxpriv->phy_apbclk);  in imx8_sata_probe()
1041 	imxpriv->clkreq_gpiod = devm_gpiod_get_optional(dev, "clkreq",  in imx8_sata_probe()
1043 	if (IS_ERR(imxpriv->clkreq_gpiod))  in imx8_sata_probe()
1044 		return PTR_ERR(imxpriv->clkreq_gpiod);  in imx8_sata_probe()
1045 	if (imxpriv->clkreq_gpiod)  in imx8_sata_probe()
1046 		gpiod_set_consumer_name(imxpriv->clkreq_gpiod, "SATA CLKREQ");  in imx8_sata_probe()
1053 	struct device *dev = &pdev->dev;  in imx_ahci_probe()
1061 		return -ENOMEM;  in imx_ahci_probe()
1063 	imxpriv->ahci_pdev = pdev;  in imx_ahci_probe()
1064 	imxpriv->no_device = false;  in imx_ahci_probe()
1065 	imxpriv->first_time = true;  in imx_ahci_probe()
1066 	imxpriv->type = (enum ahci_imx_type)device_get_match_data(dev);  in imx_ahci_probe()
1068 	imxpriv->sata_clk = devm_clk_get(dev, "sata");  in imx_ahci_probe()
1069 	if (IS_ERR(imxpriv->sata_clk)) {  in imx_ahci_probe()
1071 		return PTR_ERR(imxpriv->sata_clk);  in imx_ahci_probe()
1074 	imxpriv->sata_ref_clk = devm_clk_get(dev, "sata_ref");  in imx_ahci_probe()
1075 	if (IS_ERR(imxpriv->sata_ref_clk)) {  in imx_ahci_probe()
1077 		return PTR_ERR(imxpriv->sata_ref_clk);  in imx_ahci_probe()
1080 	imxpriv->ahb_clk = devm_clk_get(dev, "ahb");  in imx_ahci_probe()
1081 	if (IS_ERR(imxpriv->ahb_clk)) {  in imx_ahci_probe()
1083 		return PTR_ERR(imxpriv->ahb_clk);  in imx_ahci_probe()
1086 	if (imxpriv->type == AHCI_IMX6Q || imxpriv->type == AHCI_IMX6QP) {  in imx_ahci_probe()
1089 		imxpriv->gpr = syscon_regmap_lookup_by_compatible(  in imx_ahci_probe()
1090 							"fsl,imx6q-iomuxc-gpr");  in imx_ahci_probe()
1091 		if (IS_ERR(imxpriv->gpr)) {  in imx_ahci_probe()
1093 				"failed to find fsl,imx6q-iomux-gpr regmap\n");  in imx_ahci_probe()
1094 			return PTR_ERR(imxpriv->gpr);  in imx_ahci_probe()
1100 		imxpriv->phy_params =  in imx_ahci_probe()
1105 	} else if (imxpriv->type == AHCI_IMX8QM) {  in imx_ahci_probe()
1115 	hpriv->plat_data = imxpriv;  in imx_ahci_probe()
1117 	ret = clk_prepare_enable(imxpriv->sata_clk);  in imx_ahci_probe()
1121 	if (imxpriv->type == AHCI_IMX53 &&  in imx_ahci_probe()
1151 	reg_val = readl(hpriv->mmio + HOST_CAP);  in imx_ahci_probe()
1154 		writel(reg_val, hpriv->mmio + HOST_CAP);  in imx_ahci_probe()
1156 	reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);  in imx_ahci_probe()
1159 		writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);  in imx_ahci_probe()
1162 	reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000;  in imx_ahci_probe()
1163 	writel(reg_val, hpriv->mmio + IMX_TIMER1MS);  in imx_ahci_probe()
1175 	clk_disable_unprepare(imxpriv->sata_clk);  in imx_ahci_probe()
1181 	struct ahci_host_priv *hpriv = host->private_data;  in ahci_imx_host_stop()
1182 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in ahci_imx_host_stop()
1185 	clk_disable_unprepare(imxpriv->sata_clk);  in ahci_imx_host_stop()
1192 	struct ahci_host_priv *hpriv = host->private_data;  in imx_ahci_suspend()
1207 	struct ahci_host_priv *hpriv = host->private_data;  in imx_ahci_resume()
1232 MODULE_AUTHOR("Richard Zhu <Hong-Xing.Zhu@freescale.com>");