118 static int imx_phy_crbit_assert(void __iomem *mmio, u32 bit, bool assert)  in imx_phy_crbit_assert()  argument
125 	crval = readl(mmio + IMX_P0PHYCR);  in imx_phy_crbit_assert()
130 	writel(crval, mmio + IMX_P0PHYCR);  in imx_phy_crbit_assert()
134 		srval = readl(mmio + IMX_P0PHYSR);  in imx_phy_crbit_assert()
143 static int imx_phy_reg_addressing(u16 addr, void __iomem *mmio)  in imx_phy_reg_addressing()  argument
149 	writel(crval, mmio + IMX_P0PHYCR);  in imx_phy_reg_addressing()
152 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, true);  in imx_phy_reg_addressing()
157 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, false);  in imx_phy_reg_addressing()
164 static int imx_phy_reg_write(u16 val, void __iomem *mmio)  in imx_phy_reg_write()  argument
170 	writel(crval, mmio + IMX_P0PHYCR);  in imx_phy_reg_write()
173 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_DATA, true);  in imx_phy_reg_write()
178 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_DATA, false);  in imx_phy_reg_write()
188 		writel(crval, mmio + IMX_P0PHYCR);  in imx_phy_reg_write()
193 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_WRITE, true);  in imx_phy_reg_write()
198 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_WRITE, false);  in imx_phy_reg_write()
206 static int imx_phy_reg_read(u16 *val, void __iomem *mmio)  in imx_phy_reg_read()  argument
211 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_READ, true);  in imx_phy_reg_read()
216 	*val = readl(mmio + IMX_P0PHYSR) & IMX_P0PHYSR_CR_DATA_OUT;  in imx_phy_reg_read()
219 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_READ, false);  in imx_phy_reg_read()
229 	void __iomem *mmio = hpriv->mmio;  in imx_sata_phy_reset()  local
249 	ret = imx_phy_reg_addressing(IMX_CLOCK_RESET, mmio);  in imx_sata_phy_reset()
252 	ret = imx_phy_reg_write(IMX_CLOCK_RESET_RESET, mmio);  in imx_sata_phy_reset()
259 		ret = imx_phy_reg_addressing(IMX_LANE0_OUT_STAT, mmio);  in imx_sata_phy_reset()
262 		ret = imx_phy_reg_read(&val, mmio);  in imx_sata_phy_reset()
281 static int read_adc_sum(void *dev, u16 rtune_ctl_reg, void __iomem * mmio)  in read_adc_sum()  argument
287 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);  in read_adc_sum()
288 	imx_phy_reg_write(rtune_ctl_reg, mmio);  in read_adc_sum()
294 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_ADC_OUT, mmio);  in read_adc_sum()
296 		imx_phy_reg_read(&adc_out_reg, mmio);  in read_adc_sum()
313 		imx_phy_reg_read(&adc_out_reg, mmio);  in read_adc_sum()
337 	void __iomem *mmio = hpriv->mmio;  in __sata_ahci_read_temperature()  local
341 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_CRCMP_LT_LIMIT, mmio);  in __sata_ahci_read_temperature()
342 	imx_phy_reg_write(read_sum, mmio);  in __sata_ahci_read_temperature()
343 	imx_phy_reg_read(&read_sum, mmio);  in __sata_ahci_read_temperature()
347 	imx_phy_reg_write(0x5A5A, mmio);  in __sata_ahci_read_temperature()
348 	imx_phy_reg_read(&read_sum, mmio);  in __sata_ahci_read_temperature()
352 	imx_phy_reg_write(0x1234, mmio);  in __sata_ahci_read_temperature()
353 	imx_phy_reg_read(&read_sum, mmio);  in __sata_ahci_read_temperature()
358 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);  in __sata_ahci_read_temperature()
359 	imx_phy_reg_read(&mpll_test_reg, mmio);  in __sata_ahci_read_temperature()
360 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);  in __sata_ahci_read_temperature()
361 	imx_phy_reg_read(&rtune_ctl_reg, mmio);  in __sata_ahci_read_temperature()
362 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);  in __sata_ahci_read_temperature()
363 	imx_phy_reg_read(&dac_ctl_reg, mmio);  in __sata_ahci_read_temperature()
383 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);  in __sata_ahci_read_temperature()
384 	imx_phy_reg_write(mpll_test_reg, mmio);  in __sata_ahci_read_temperature()
385 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);  in __sata_ahci_read_temperature()
386 	imx_phy_reg_write(dac_ctl_reg, mmio);  in __sata_ahci_read_temperature()
387 	m1 = read_adc_sum(dev, rtune_ctl_reg, mmio);  in __sata_ahci_read_temperature()
392 	m2 = read_adc_sum(dev, rtune_ctl_reg, mmio);  in __sata_ahci_read_temperature()
404 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);  in __sata_ahci_read_temperature()
405 	imx_phy_reg_write(mpll_test_reg, mmio);  in __sata_ahci_read_temperature()
406 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);  in __sata_ahci_read_temperature()
407 	imx_phy_reg_write(dac_ctl_reg, mmio);  in __sata_ahci_read_temperature()
408 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);  in __sata_ahci_read_temperature()
409 	imx_phy_reg_write(rtune_ctl_reg, mmio);  in __sata_ahci_read_temperature()
758 	void __iomem *mmio = hpriv->mmio;  in ahci_imx_error_handler()  local
775 	reg_val = readl(mmio + IMX_P0PHYCR);  in ahci_imx_error_handler()
776 	writel(reg_val | IMX_P0PHYCR_TEST_PDDQ, mmio + IMX_P0PHYCR);  in ahci_imx_error_handler()
1151 	reg_val = readl(hpriv->mmio + HOST_CAP);  in imx_ahci_probe()
1154 		writel(reg_val, hpriv->mmio + HOST_CAP);  in imx_ahci_probe()
1156 	reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);  in imx_ahci_probe()
1159 		writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);  in imx_ahci_probe()
1163 	writel(reg_val, hpriv->mmio + IMX_TIMER1MS);  in imx_ahci_probe()