Lines Matching +full:os +full:- +full:initiated
1 /* SPDX-License-Identifier: MIT */
3 * Copyright (C) 2020-2023 Intel Corporation
12 * fw_bin_header->api_version[VPU_BOOT_API_VER_ID] = (VPU_BOOT_API_VER_MAJOR << 16) |
42 /* ------------ FW API version information end ---------------------*/
73 /* Space reserved for future preemption-related fields. */
91 /** VPU scheduling mode. By default, OS scheduling is used. */
194 /* Clock frequencies: 0x20 - 0xFF */
199 /* Memory regions: 0x100 - 0x1FF */
219 /* IRQ re-direct numbers: 0x200 - 0x2FF */
222 /* ARM -> VPU doorbell interrupt. ARM is notifying VPU of async command or compute job. */
224 /* VPU -> ARM job done interrupt. VPU is notifying ARM of compute job completion. */
226 /* VPU -> ARM IRQ line to use to request MMU update. */
228 /* ARM -> VPU IRQ line to use to notify of MMU update completion. */
230 /* ARM -> VPU IRQ line to use to request power level change. */
232 /* VPU -> ARM IRQ line to use to notify of power level change completion. */
234 /* VPU -> ARM IRQ line to use to notify of VPU idle state change */
236 /* VPU -> ARM IRQ line to use to request counter reset. */
238 /* ARM -> VPU IRQ line to use to notify of counter reset completion. */
240 /* VPU -> ARM IRQ line to use to notify of preemption completion. */
244 /* Silicon information: 0x300 - 0x3FF */
259 * TODO: EISW-33556: Move log level definition (mvLog_t) to this file.
295 * On-demand: Default if 0.
296 * Bit 0-7 - uint8_t: Highest residency percent
297 * Bit 8-15 - uint8_t: High residency percent
298 * Bit 16-23 - uint8_t: Low residency percent
299 * Bit 24-31 - uint8_t: Lowest residency percent
300 * Bit 32-35 - unsigned 4b: PLL Ratio increase amount on highest residency
301 * Bit 36-39 - unsigned 4b: PLL Ratio increase amount on high residency
302 * Bit 40-43 - unsigned 4b: PLL Ratio decrease amount on low residency
303 * Bit 44-47 - unsigned 4b: PLL Ratio decrease amount on lowest frequency
304 * Bit 48-55 - uint8_t: Period (ms) for residency decisions
305 * Bit 56-63 - uint8_t: Averaging windows (as multiples of period. Max: 30 decimal)
321 /* Warm boot information: 0x400 - 0x43F */
326 /* Power States transitions timestamps: 0x440 - 0x46F*/
328 /* VPU_IDLE -> VPU_ACTIVE transition initiated timestamp */
330 /* VPU_IDLE -> VPU_ACTIVE transition completed timestamp */
332 /* VPU_ACTIVE -> VPU_IDLE transition initiated timestamp */
334 /* VPU_ACTIVE -> VPU_IDLE transition completed timestamp */
336 /* VPU_IDLE -> VPU_STANDBY transition initiated timestamp */
338 /* VPU_IDLE -> VPU_STANDBY transition completed timestamp */
349 /* Unused/reserved: 0x480 - 0xFFF */
388 /* legacy field - do not use */
402 * 0 - null terminated string
403 * 1 - size + null terminated string
404 * 2 - MIPI-SysT encoding
409 * 0 - messages are place 1 after another
410 * n - every message starts and multiple on offset