accel/ivpu/vpu_boot_api.h

189 struct vpu_boot_params {  struct
190 	u32 magic;
191 	u32 vpu_id;
192 	u32 vpu_count;
193 	u32 pad0[5];
195 	u32 frequency;
196 	u32 pll[VPU_BOOT_PLL_COUNT][VPU_BOOT_PLL_OUT_COUNT];
197 	u32 perf_clk_frequency;
198 	u32 pad1[42];
200 	u64 ipc_header_area_start;
201 	u32 ipc_header_area_size;
202 	u64 shared_region_base;
203 	u32 shared_region_size;
204 	u64 ipc_payload_area_start;
205 	u32 ipc_payload_area_size;
206 	u64 global_aliased_pio_base;
207 	u32 global_aliased_pio_size;
208 	u32 autoconfig;
209 	struct vpu_boot_l2_cache_config cache_defaults[VPU_BOOT_L2_CACHE_CFG_NUM];
210 	u64 global_memory_allocator_base;
211 	u32 global_memory_allocator_size;
216 	u64 shave_nn_fw_base;
217 	u64 save_restore_ret_address; /* stores the address of FW's restore entry point */
218 	u32 pad2[43];
220 	s32 watchdog_irq_mss;
221 	s32 watchdog_irq_nce;
223 	u32 host_to_vpu_irq;
225 	u32 job_done_irq;
227 	u32 mmu_update_request_irq;
229 	u32 mmu_update_done_irq;
231 	u32 set_power_level_irq;
233 	u32 set_power_level_done_irq;
235 	u32 set_vpu_idle_update_irq;
237 	u32 metric_query_event_irq;
239 	u32 metric_query_event_done_irq;
241 	u32 preemption_done_irq;
243 	u32 pad3[52];
245 	u32 host_version_id;
246 	u32 si_stepping;
247 	u64 device_id;
248 	u64 feature_exclusion;
249 	u64 sku;
251 	u32 min_freq_pll_ratio;
253 	u32 max_freq_pll_ratio;
261 	u32 default_trace_level;
262 	u32 boot_type;
263 	u64 punit_telemetry_sram_base;
264 	u64 punit_telemetry_sram_size;
265 	u32 vpu_telemetry_enable;
266 	u64 crit_tracing_buff_addr;
267 	u32 crit_tracing_buff_size;
268 	u64 verbose_tracing_buff_addr;
269 	u32 verbose_tracing_buff_size;
270 	u64 verbose_tracing_sw_component_mask; /* TO BE REMOVED */
275 	u32 trace_destination_mask;
280 	u64 trace_hw_component_mask;
282 	u64 tracing_buff_message_format_mask;
283 	u64 trace_reserved_1[2];
288 	u32 temp_sensor_period_ms;
290 	u32 pn_freq_pll_ratio;
292 	u32 dvfs_mode;
308 	u64 dvfs_param;
315 	u32 d0i3_delayed_entry;
317 	u64 d0i3_residency_time_us;
319 	u64 d0i3_entry_vpu_ts;
320 	u32 pad4[20];
322 	u32 warm_boot_sections_count;
323 	u32 warm_boot_start_address_reference;
324 	u32 warm_boot_section_info_address_offset;
325 	u32 pad5[13];
327 	struct {
340 	} power_states_timestamps;
342 	u32 vpu_scheduling_mode;
344 	u32 vpu_focus_present_timer_ms;
346 	u32 vpu_uses_ecc_mca_signal;
348 	u32 vpu_operation_mode;
350 	u32 pad6[736];