Lines Matching +full:use +full:- +full:ram +full:- +full:code
1 # SPDX-License-Identifier: GPL-2.0
58 Xtensa processors are 32-bit RISC machines designed by Tensilica
63 a home page at <http://www.linux-xtensa.org/>.
102 def_bool $(success,test "$(shell,echo __XTENSA_EB__ | $(CC) -E -P -)" = 1)
108 …def_bool $(success,test "$(shell,echo __XTENSA_CALL0_ABI__ | $(CC) -mabi=call0 -E -P - 2>/dev/null…
117 bool "fsf - default (not generic) configuration"
121 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
128 bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
138 Select this variant to use a custom Xtensa processor configuration.
164 ie: it supports a TLB with auto-loading, page protection.
216 instructions raise an exception with the LoadStoreErrorCause code.
217 This makes it hard to use some configurations, e.g. store string
221 byte and 2-byte access to memory attached to instruction bus.
228 This option is used to indicate that the system-on-a-chip (SOC)
242 bool "Enable Symmetric multi-processing support"
251 int "Maximum number of CPUs (2-32)"
265 bool "Secondary cores use alternative reset vector"
269 Secondary cores may be configured to use alternative reset vector,
270 or all cores may use primary reset vector.
303 Select ABI for the kernel code. This ABI is independent of the
308 all register windows support code will be omitted from the
316 Select this option to compile kernel code with the default ABI
318 Normally cores with windowed registers option use windowed ABI and
319 cores without it use call0 ABI.
324 Select this option to compile kernel code with call0 ABI even with
327 be used for the kernel code.
357 Choose this option if you're planning to run only user code
410 XT2000 is the name of Tensilica's feature-rich emulation platform.
447 default "console=ttyS0,38400 root=/dev/ram"
451 architectures, you should supply some command-line options at build
486 Use simcall instruction. simcall is only available on simulators,
492 Use break instruction. It is available on real hardware when GDB
498 tristate "Host file-based simulated block device support"
504 interface provided the device is not in use.
507 int "Number of host file-based simulated block devices"
530 Another simulated disk in a host file for a buildroot-independent
555 bool "Use 8-bit access to XTFPGA LCD"
559 LCD may be connected with 4- or 8-bit interface, 8-bit access may
560 only be used with 8-bit interface. Please consult prototyping user
566 bool "Initialize Xtensa MMU inside the Linux kernel code"
576 This unfortunately won't work for U-Boot and likely also won't
581 use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
582 xt-gdb can't place a Software Breakpoint in the 0XD region prior
590 Selecting this will cause U-Boot to set the KERNEL Load and Entry
596 bool "Kernel Execute-In-Place from ROM"
599 Execute-In-Place allows the kernel to run from non-volatile storage
600 directly addressable by the CPU, such as NOR flash. This saves RAM
602 to RAM. Read-write sections, such as the data section and stack,
603 are still copied to RAM. The XIP kernel is not compressed since
623 region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
624 bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
643 2: WB, no-write-allocate cache,
689 placed at their hardware-defined locations.
705 Use it to put vectors into IRAM or out of FLASH on kernels with
706 XIP-aware MTD support.
776 Linux can use the full amount of RAM in the system by
786 machine with more than 128 MB total physical RAM, answer