1 // SPDX-License-Identifier: GPL-2.0
6 #include <asm/tlb.h>
11 phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;
23 void paravirt_tlb_remove_table(struct mmu_gather *tlb, void *table)  in paravirt_tlb_remove_table()  argument
25 	tlb_remove_page(tlb, table);  in paravirt_tlb_remove_table()
39 		return -EINVAL;  in setup_userpte()
48 		return -EINVAL;  in setup_userpte()
53 void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)  in ___pte_free_tlb()  argument
57 	paravirt_tlb_remove_table(tlb, pte);  in ___pte_free_tlb()
61 void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)  in ___pmd_free_tlb()  argument
66 	 * NOTE! For PAE, any changes to the top page-directory-pointer-table  in ___pmd_free_tlb()
70 	tlb->need_flush_all = 1;  in ___pmd_free_tlb()
73 	paravirt_tlb_remove_table(tlb, ptdesc_page(ptdesc));  in ___pmd_free_tlb()
77 void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)  in ___pud_free_tlb()  argument
83 	paravirt_tlb_remove_table(tlb, virt_to_page(pud));  in ___pud_free_tlb()
87 void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d)  in ___p4d_free_tlb()  argument
90 	paravirt_tlb_remove_table(tlb, virt_to_page(p4d));  in ___p4d_free_tlb()
100 	list_add(&ptdesc->pt_list, &pgd_list);  in pgd_list_add()
107 	list_del(&ptdesc->pt_list);  in pgd_list_del()
118 	virt_to_ptdesc(pgd)->pt_mm = mm;  in pgd_set_mm()
123 	return page_ptdesc(page)->pt_mm;  in pgd_page_get_mm()
129 	   ptes in non-PAE, or shared PMD in PAE), then just copy the  in pgd_ctor()
157  * List of all pgd's needed for non-PAE so it can invalidate entries
160  * tactic would be needed. This is essentially codepath-based locking
164  * -- nyc
169  * In PAE mode, we need to do a cr3 reload (=tlb flush) when
170  * updating the top-level pagetable entries to guarantee the
172  * all 4 top-level entries are used almost immediately in a
173  * new process's life, we just pre-populate them here.
183  * We allocate separate PMDs for the kernel part of the user page-table
184  * when PTI is enabled. We need them to map the per-process LDT into the
185  * user-space page-table.
200 	 * According to Intel App note "TLBs, Paging-Structure Caches,  in pud_populate()
201 	 * and Their Invalidation", April 2007, document 317080-001,  in pud_populate()
203 	 * TLB via cr3 if the top-level pgd is changed...  in pud_populate()
209 /* No need to prepopulate any pagetable entries in non-PAE modes. */
218 	int i;  in free_pmds()  local
221 	for (i = 0; i < count; i++)  in free_pmds()
222 		if (pmds[i]) {  in free_pmds()
223 			ptdesc = virt_to_ptdesc(pmds[i]);  in free_pmds()
233 	int i;  in preallocate_pmds()  local
241 	for (i = 0; i < count; i++) {  in preallocate_pmds()
257 		pmds[i] = pmd;  in preallocate_pmds()
262 		return -ENOMEM;  in preallocate_pmds()
291 	int i;  in pgd_mop_up_pmds()  local
293 	for (i = 0; i < PREALLOCATED_PMDS; i++)  in pgd_mop_up_pmds()
294 		mop_up_one_pmd(mm, &pgdp[i]);  in pgd_mop_up_pmds()
303 	for (i = 0; i < PREALLOCATED_USER_PMDS; i++)  in pgd_mop_up_pmds()
304 		mop_up_one_pmd(mm, &pgdp[i + KERNEL_PGD_BOUNDARY]);  in pgd_mop_up_pmds()
312 	int i;  in pgd_prepopulate_pmd()  local
317 	for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {  in pgd_prepopulate_pmd()
318 		pmd_t *pmd = pmds[i];  in pgd_prepopulate_pmd()
320 		if (i >= KERNEL_PGD_BOUNDARY)  in pgd_prepopulate_pmd()
321 			memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]),  in pgd_prepopulate_pmd()
336 	int i;  in pgd_prepopulate_user_pmd()  local
344 	for (i = 0; i < PREALLOCATED_USER_PMDS; i++, u_pud++, s_pgd++) {  in pgd_prepopulate_user_pmd()
345 		pmd_t *pmd = pmds[i];  in pgd_prepopulate_user_pmd()
388 	 * page for pgd. We are able to just allocate a 32-byte for pgd.  in pgtable_cache_init()
389 	 * During boot time, we create a 32-byte slab for pgd table allocation.  in pgtable_cache_init()
407 	 * a 32-byte slab for pgd to save memory space.  in _pgd_alloc()
444 	mm->pgd = pgd;  in pgd_alloc()
458 	 * Make sure that pre-populating the pmds is atomic with  in pgd_alloc()
526 		 * We had a write-protection fault here and changed the pmd  in pmdp_set_access_flags()
527 		 * to to more permissive. No need to flush the TLB for that,  in pmdp_set_access_flags()
529 		 * worst-case we'll generate a spurious fault.  in pmdp_set_access_flags()
546 		 * We had a write-protection fault here and changed the pud  in pudp_set_access_flags()
547 		 * to to more permissive. No need to flush the TLB for that,  in pudp_set_access_flags()
549 		 * worst-case we'll generate a spurious fault.  in pudp_set_access_flags()
564 					 (unsigned long *) &ptep->pte);  in ptep_test_and_clear_young()
601 	 * On x86 CPUs, clearing the accessed bit without a TLB flush  in ptep_clear_flush_young()
606 	 * So as a performance optimization don't flush the TLB when  in ptep_clear_flush_young()
643  * reserve_top_address - reserves a hole in the top of kernel address space
644  * @reserve - size of hole to reserve
653 	__FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;  in reserve_top_address()
655 	       -reserve, __FIXADDR_TOP + PAGE_SIZE);  in reserve_top_address()
694  * p4d_set_huge - setup kernel P4D mapping
696  * No 512GB pages yet -- always return 0
704  * p4d_clear_huge - clear kernel P4D mapping when it is set
706  * No 512GB pages yet -- always return 0
714  * pud_set_huge - setup kernel PUD mapping
717  * function sets up a huge page only if the complete range has the same MTRR
720  * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
733 	/* Bail out if we are we on a populated non-leaf entry: */  in pud_set_huge()
745  * pmd_set_huge - setup kernel PMD mapping
757 …pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR over…  in pmd_set_huge()
762 	/* Bail out if we are we on a populated non-leaf entry: */  in pmd_set_huge()
774  * pud_clear_huge - clear kernel PUD mapping when it is set
789  * pmd_clear_huge - clear kernel PMD mapping when it is set
805  * pud_free_pmd_page - Clear pud entry and free pmd page.
809  * Context: The pud range has been unmapped and TLB purged.
818 	int i;  in pud_free_pmd_page()  local
825 	for (i = 0; i < PTRS_PER_PMD; i++) {  in pud_free_pmd_page()
826 		pmd_sv[i] = pmd[i];  in pud_free_pmd_page()
827 		if (!pmd_none(pmd[i]))  in pud_free_pmd_page()
828 			pmd_clear(&pmd[i]);  in pud_free_pmd_page()
833 	/* INVLPG to clear all paging-structure caches */  in pud_free_pmd_page()
834 	flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);  in pud_free_pmd_page()
836 	for (i = 0; i < PTRS_PER_PMD; i++) {  in pud_free_pmd_page()
837 		if (!pmd_none(pmd_sv[i])) {  in pud_free_pmd_page()
838 			pte = (pte_t *)pmd_page_vaddr(pmd_sv[i]);  in pud_free_pmd_page()
852  * pmd_free_pte_page - Clear pmd entry and free pte page.
856  * Context: The pmd range has been unmapped and TLB purged.
866 	/* INVLPG to clear all paging-structure caches */  in pmd_free_pte_page()
867 	flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);  in pmd_free_pte_page()
877  * Disable free page handling on x86-PAE. This assures that ioremap()
890 	if (vma->vm_flags & VM_SHADOW_STACK)  in pte_mkwrite()
900 	if (vma->vm_flags & VM_SHADOW_STACK)  in pmd_mkwrite()
917 	VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) &&  in arch_check_zapped_pte()
924 	VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) &&  in arch_check_zapped_pmd()