47 	if (boot_cpu_data.cpuid_level < 0 ||  in jailhouse_cpuid_base()
49 		return 0;  in jailhouse_cpuid_base()
51 	return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);  in jailhouse_cpuid_base()
61 	memset(now, 0, sizeof(*now));  in jailhouse_get_wallclock()
102 	register_lapic_address(0xfee00000);  in jailhouse_get_smp_config()
104 	for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++)  in jailhouse_get_smp_config()
110 		mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg);  in jailhouse_get_smp_config()
136 	if (pcibios_last_bus < 0)  in jailhouse_pci_arch_init()
137 		pcibios_last_bus = 0xff;  in jailhouse_pci_arch_init()
141 		pci_mmconfig_add(0, 0, pcibios_last_bus,  in jailhouse_pci_arch_init()
147 	return 0;  in jailhouse_pci_arch_init()
159 	static const u16 pcuart_base[] = {0x3f8, 0x2f8, 0x3e8, 0x2e8};  in jailhouse_serial_fixup()
162 	for (n = 0; n < ARRAY_SIZE(pcuart_base); n++) {  in jailhouse_serial_fixup()
167 			pr_info("Enabling UART%u (port 0x%lx)\n", n,  in jailhouse_serial_fixup()
172 			up->iobase = 0;  in jailhouse_serial_fixup()
212 	x86_platform.legacy.rtc		= 0;  in jailhouse_init_platform()
213 	x86_platform.legacy.warm_reset	= 0;  in jailhouse_init_platform()
245 	if (setup_data.hdr.version == 0 ||  in jailhouse_init_platform()
258 	pci_probe = 0;  in jailhouse_init_platform()
275 	return jailhouse_cpuid_base() != 0;  in jailhouse_paravirt()