Lines Matching full:hpet

6 #include <linux/hpet.h>
11 #include <asm/hpet.h>
16 #define pr_fmt(fmt) "hpet: " fmt
49 * HPET address is set in acpi/boot.c, when an ACPI entry exists
99 * HPET command line enable / disable
118 __setup("hpet=", hpet_setup);
133 * is_hpet_enabled - Check whether the legacy HPET timer interrupt is enabled
183 * When the HPET driver (/dev/hpet) is enabled, we need to reserve
234 /* Associate the first unused channel to /dev/hpet */ in hpet_select_device_channel()
247 /* Common HPET functions */
315 * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL in hpet_clkevt_set_state_periodic()
377 * delayed internally up to two HPET clock cycles in certain in hpet_clkevt_set_next_event()
420 * Start HPET with the boot CPU's cpumask and make it global after in hpet_legacy_clockevent_register()
424 strscpy(hc->name, "hpet", sizeof(hc->name)); in hpet_legacy_clockevent_register()
430 * Legacy horrors and sins from the past. HPET used periodic mode in hpet_legacy_clockevent_register()
437 * the next interrupt is not delivered despite the HPET channel in hpet_legacy_clockevent_register()
438 * being programmed correctly. Reprogramming the HPET after in hpet_legacy_clockevent_register()
445 * stage makes if hang because the HPET does not get in hpet_legacy_clockevent_register()
448 * Both issues require major surgery and especially the kick HPET in hpet_legacy_clockevent_register()
450 * This 'assume periodic works' magic has survived since HPET in hpet_legacy_clockevent_register()
460 /* Start HPET legacy interrupts */ in hpet_legacy_clockevent_register()
470 * HPET MSI Support
505 .name = "HPET-MSI",
578 hpet_msi_controller.name = "IR-HPET-MSI"; in hpet_create_irq_domain()
628 pr_info("Spurious interrupt HPET channel %d\n", hc->num); in hpet_msi_interrupt_handler()
727 /* Only consider HPET channel with MSI support */ in hpet_select_clockevents()
731 sprintf(hc->name, "hpet%d", i); in hpet_select_clockevents()
762 * Reading the HPET counter is a very slow operation. If a large number of
763 * CPUs are trying to access the HPET counter simultaneously, it can cause
765 * happen when HPET is the default clock source instead of TSC. For a
770 * If multiple CPUs are trying to access the HPET counter at the same time,
778 * The lock and the HPET value are stored together and can be read in a
790 static union hpet_lock hpet __cacheline_aligned = {
802 * Read HPET directly if in NMI. in read_hpet()
808 * Read the current state of the lock and HPET value atomically. in read_hpet()
810 old.lockval = READ_ONCE(hpet.lockval); in read_hpet()
816 if (arch_spin_trylock(&hpet.lock)) { in read_hpet()
821 WRITE_ONCE(hpet.value, new.value); in read_hpet()
822 arch_spin_unlock(&hpet.lock); in read_hpet()
832 * Wait until the HPET value change or the lock is free to indicate in read_hpet()
836 * HPET value while the lock holder was in the process of releasing in read_hpet()
838 * the value immediately instead of waiting for the next HPET reader in read_hpet()
843 new.lockval = READ_ONCE(hpet.lockval); in read_hpet()
859 .name = "hpet",
869 * HPET emulation to provide proper frequency setting.
871 * On such systems the SMM code is initialized with the first HPET register
875 * HPET is up and running before we proceed any further.
877 * A counting loop is safe, as the HPET access takes thousands of CPU cycles.
891 pr_warn("Config register invalid. Disabling HPET\n"); in hpet_cfg_working()
916 pr_warn("Counter not counting. HPET disabled\n"); in hpet_counting()
941 * Check whether the system supports PC10. If so force disable HPET as that
949 * That's perfectly fine. HPET is a piece of hardware designed by committee
954 * If HPET is functional it is useful for calibrating TSC, but this can be
959 * In theory HPET support should be removed altogether, but there are older
988 pr_warn("HPET force enabled via command line, but dysfunctional in PC10.\n"); in hpet_is_pc10_damaged()
992 pr_info("HPET dysfunctional in PC10. Force disabled.\n"); in hpet_is_pc10_damaged()
998 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
1034 * Read the HPET ID register to retrieve the IRQ routing in hpet_enable()
1040 /* This is the HPET channel number which is zero based */ in hpet_enable()
1052 pr_warn("Disabling HPET.\n"); in hpet_enable()
1118 * which might have detected a system on which the HPET can be enforced.
1120 * Also, the MSI machinery is not working yet when the HPET is initialized
1123 * If the HPET is enabled, then:
1125 * 1) Reserve one channel for /dev/hpet if CONFIG_HPET=y
1127 * 3) Setup /dev/hpet if CONFIG_HPET=y
1153 ret = cpuhp_setup_state(CPUHP_AP_X86_HPET_ONLINE, "x86/hpet:online", in hpet_late_init()
1157 ret = cpuhp_setup_state(CPUHP_X86_HPET_DEAD, "x86/hpet:dead", NULL, in hpet_late_init()
1186 /* If the HPET was enabled at boot time, reenable it */ in hpet_disable()
1194 * HPET in LegacyReplacement mode eats up the RTC interrupt line. When HPET
1232 * Check that the HPET counter c1 is ahead of c2
1271 * is not supported by all HPET implementations for channel 1.
1324 * Return 0 if HPET is not being used.