1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <asm/processor-flags.h>
41 	u64 fixed:1;  member
51 		return -EINVAL;  in mtrr_param_setup()
55 		rc = -EINVAL;  in mtrr_param_setup()
65  * - no two adjacent fixed MTRRs share the same cache mode
66  * - one variable MTRR is spanning a huge area with mode WB
67  * - 255 variable MTRRs with mode UC all overlap with the WB MTRR, creating 2
69  *   accounting for MTRR_MAX_VAR_RANGES * 2 - 1 range entries
70  * - a TOP_MEM2 area (even with overlapping an UC MTRR can't add 2 range entries
100  * to 1 during BIOS initialization of the fixed MTRRs, then cleared to
121 /* Get the size of contiguous MTRR range */
124 	u64 size;  in get_mtrr_size()  local
127 	size = -mask;  in get_mtrr_size()
129 	return size;  in get_mtrr_size()
132 static u8 get_var_mtrr_state(unsigned int reg, u64 *start, u64 *size)  in get_var_mtrr_state()  argument
136 	if (!(mtrr->mask_lo & MTRR_PHYSMASK_V))  in get_var_mtrr_state()
139 	*start = (((u64)mtrr->base_hi) << 32) + (mtrr->base_lo & PAGE_MASK);  in get_var_mtrr_state()
140 	*size = get_mtrr_size((((u64)mtrr->mask_hi) << 32) +  in get_var_mtrr_state()
141 			      (mtrr->mask_lo & PAGE_MASK));  in get_var_mtrr_state()
143 	return mtrr->base_lo & MTRR_PHYSBASE_TYPE;  in get_var_mtrr_state()
163 	cache_map_n--;  in rm_map_entry_at()
166 			sizeof(*cache_map) * (cache_map_n - idx));  in rm_map_entry_at()
176  * Note that the corrected index can never go below -1 (resulting in being 0 in
188 		struct cache_map *prev = cache_map + idx - 1;  in add_map_entry_at()
190 		if (!prev->fixed && start == prev->end && type == prev->type)  in add_map_entry_at()
197 		if (!next->fixed && end == next->start && type == next->type)  in add_map_entry_at()
202 		cache_map[idx - 1].end = cache_map[idx].end;  in add_map_entry_at()
207 		cache_map[idx - 1].end = end;  in add_map_entry_at()
224 			sizeof(*cache_map) * (cache_map_n - idx));  in add_map_entry_at()
230 	cache_map[idx].fixed = 0;  in add_map_entry_at()
275 			i -= add_map_entry_at(start, tmp,  type, i);  in add_map_entry()
283 		if (cache_map[i].fixed || new_type == old_type) {  in add_map_entry()
292 		i -= add_map_entry_at(start, tmp, new_type, i);  in add_map_entry()
303 	u64 start, size;  in map_add_var()  local
314 		cache_map[cache_map_n - 1].fixed = 1;  in map_add_var()
318 		type = get_var_mtrr_state(i, &start, &size);  in map_add_var()
320 			add_map_entry(start, start + size, type);  in map_add_var()
348 	u64 start, end, size;  in mtrr_build_map()  local
352 	/* Add fixed MTRRs, optimize for adjacent entries with same type. */  in mtrr_build_map()
355 		 * Start with 64k size fixed entries, preset 1st one (hence the  in mtrr_build_map()
359 		end = size = 0x10000;  in mtrr_build_map()
365 				size >>= 2;  in mtrr_build_map()
372 			end += size;  in mtrr_build_map()
377 	/* Mark fixed, they take precedence. */  in mtrr_build_map()
379 		cache_map[i].fixed = 1;  in mtrr_build_map()
384 	pr_info("MTRR map: %u entries (%u fixed + %u variable; max %u), built from %u variable MTRRs\n",  in mtrr_build_map()
385 		cache_map_n, cache_map_fixed, cache_map_n - cache_map_fixed,  in mtrr_build_map()
390 			pr_info("%3u: %016llx-%016llx %s\n", i,  in mtrr_build_map()
391 				cache_map[i].start, cache_map[i].end - 1,  in mtrr_build_map()
423  * mtrr_overwrite_state - set static MTRR state
451 	 * - when running as Hyper-V, SEV-SNP guest using vTOM  in mtrr_overwrite_state()
452 	 * - when running as Xen PV guest  in mtrr_overwrite_state()
453 	 * - when running as SEV-SNP or TDX guest to avoid unnecessary  in mtrr_overwrite_state()
497  * mtrr_type_lookup - look up memory type in MTRR
502  *  - 1: the returned MTRR type is valid for the whole region
503  *  - 0: otherwise
506  * MTRR_TYPE_(type)  - The effective MTRR type for the region
507  * MTRR_TYPE_INVALID - MTRR is disabled
526 		/* Region after current map entry? -> continue with next one. */  in mtrr_type_lookup()
534 			/* End of region not covered, too? -> lookup done. */  in mtrr_type_lookup()
545 	/* End of region past last entry in map? -> use default type. */  in mtrr_type_lookup()
556 	rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);  in get_mtrr_var_range()
557 	rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi);  in get_mtrr_var_range()
604 	pr_info("  %05X-%05X %s\n", last_fixed_start,  in print_fixed_last()
605 		last_fixed_end - 1, mtrr_attrib_to_str(last_fixed_type));  in print_fixed_last()
646 		pr_info("MTRR fixed ranges %sabled:\n",  in print_mtrr_state()
663 	high_width = (boot_cpu_data.x86_phys_bits - (32 - PAGE_SHIFT) + 3) / 4;  in print_mtrr_state()
732 		pr_warn("mtrr: your CPUs had inconsistent fixed MTRR settings\n");  in mtrr_state_warn()
756  * set_fixed_range - checks & updates a fixed-range MTRR if it
775  * generic_get_free_region - Get a free MTRR.
777  * @size: The size (in bytes) of the region.
783 generic_get_free_region(unsigned long base, unsigned long size, int replace_reg)  in generic_get_free_region()  argument
794 		mtrr_if->get(i, &lbase, &lsize, &ltype);  in generic_get_free_region()
799 	return -ENOSPC;  in generic_get_free_region()
803 			     unsigned long *size, mtrr_type *type)  in generic_get_mtrr()  argument
820 		*size = 0;  in generic_get_mtrr()
834 		tmp |= ~((1ULL<<(hi - 1)) - 1);  in generic_get_mtrr()
844 	 * This works correctly if size is a power of two, i.e. a  in generic_get_mtrr()
847 	*size = -mask >> PAGE_SHIFT;  in generic_get_mtrr()
848 	*base = (u64)base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT;  in generic_get_mtrr()
856  * set_fixed_ranges - checks & updates the fixed-range MTRRs if they
858  * @frs: pointer to fixed-range MTRR values, saved by get_fixed_ranges()
864 	int block = -1, range;  in set_fixed_ranges()
887 	if ((vr->base_lo & ~MTRR_PHYSBASE_RSVD) != (lo & ~MTRR_PHYSBASE_RSVD)  in set_mtrr_var_ranges()
888 	    || (vr->base_hi & ~phys_hi_rsvd) != (hi & ~phys_hi_rsvd)) {  in set_mtrr_var_ranges()
890 		mtrr_wrmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);  in set_mtrr_var_ranges()
896 	if ((vr->mask_lo & ~MTRR_PHYSMASK_RSVD) != (lo & ~MTRR_PHYSMASK_RSVD)  in set_mtrr_var_ranges()
897 	    || (vr->mask_hi & ~phys_hi_rsvd) != (hi & ~phys_hi_rsvd)) {  in set_mtrr_var_ranges()
898 		mtrr_wrmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi);  in set_mtrr_var_ranges()
907  * set_mtrr_state - Set the MTRR state for this CPU.
975  * generic_set_mtrr - set variable MTRR register on the local CPU.
979  * @size: The size of the region. If this is 0 the region is disabled.
985 			     unsigned long size, mtrr_type type)  in generic_set_mtrr()  argument
995 	if (size == 0) {  in generic_set_mtrr()
1003 		vr->base_lo = base << PAGE_SHIFT | type;  in generic_set_mtrr()
1004 		vr->base_hi = (base >> (32 - PAGE_SHIFT)) & ~phys_hi_rsvd;  in generic_set_mtrr()
1005 		vr->mask_lo = -size << PAGE_SHIFT | MTRR_PHYSMASK_V;  in generic_set_mtrr()
1006 		vr->mask_hi = (-size >> (32 - PAGE_SHIFT)) & ~phys_hi_rsvd;  in generic_set_mtrr()
1008 		mtrr_wrmsr(MTRRphysBase_MSR(reg), vr->base_lo, vr->base_hi);  in generic_set_mtrr()
1009 		mtrr_wrmsr(MTRRphysMask_MSR(reg), vr->mask_lo, vr->mask_hi);  in generic_set_mtrr()
1016 int generic_validate_add_page(unsigned long base, unsigned long size,  in generic_validate_add_page()  argument
1023 	 * must be 4 MiB aligned and not touch 0x70000000 -> 0x7003FFFF  in generic_validate_add_page()
1028 		if (base & ((1 << (22 - PAGE_SHIFT)) - 1)) {  in generic_validate_add_page()
1030 			return -EINVAL;  in generic_validate_add_page()
1032 		if (!(base + size < 0x70000 || base > 0x7003F) &&  in generic_validate_add_page()
1036 			return -EINVAL;  in generic_validate_add_page()
1044 	last = base + size - 1;  in generic_validate_add_page()
1049 		pr_warn("mtrr: base(0x%lx000) is not aligned on a size(0x%lx000) boundary\n", base, size);  in generic_validate_add_page()
1050 		return -EINVAL;  in generic_validate_add_page()