1 // SPDX-License-Identifier: GPL-2.0+
5  * Copyright (C) 2018 Chengdu Haiguang IC Design Co., Ltd.
16 #include <asm/spec-ctrl.h>
38 	for (i = apicid - 1; i >= 0; i--) {  in nearby_node()
60  * (1) Hygon multi-node processors
62  * (2) Hygon processors supporting compute units
66 	/* get information required for multi-node processors */  in hygon_get_topology()
73 		c->topo.die_id  = ecx & 0xff;  in hygon_get_topology()
75 		c->topo.core_id = ebx & 0xff;  in hygon_get_topology()
78 			c->x86_max_cores /= smp_num_siblings;  in hygon_get_topology()
86 			c->x86_coreid_bits = get_count_order(c->x86_max_cores);  in hygon_get_topology()
89 		 * Socket ID is ApicId[6] for the processors with model <= 0x3  in hygon_get_topology()
92 		if (!boot_cpu_has(X86_FEATURE_HYPERVISOR) && c->x86_model <= 0x3)  in hygon_get_topology()
93 			c->topo.pkg_id = c->topo.apicid >> APICID_SOCKET_ID_BIT;  in hygon_get_topology()
100 		c->topo.die_id = value & 7;  in hygon_get_topology()
101 		c->topo.llc_id = c->topo.die_id;  in hygon_get_topology()
117 	bits = c->x86_coreid_bits;  in hygon_detect_cmp()
119 	c->topo.core_id = c->topo.initial_apicid & ((1 << bits)-1);  in hygon_detect_cmp()
121 	c->topo.pkg_id = c->topo.initial_apicid >> bits;  in hygon_detect_cmp()
123 	c->topo.llc_id = c->topo.die_id = c->topo.pkg_id;  in hygon_detect_cmp()
131 	unsigned int apicid = c->topo.apicid;  in srat_detect_node()
135 		node = c->topo.llc_id;  in srat_detect_node()
138 	 * On multi-fabric platform (e.g. Numascale NumaChip) a  in srat_detect_node()
139 	 * platform-specific handler needs to be called to fixup some  in srat_detect_node()
149 		 * - The CPU is missing memory and no node was created.  In  in srat_detect_node()
152 		 * - The APIC IDs differ from the HyperTransport node IDs.  in srat_detect_node()
164 		int ht_nodeid = c->topo.initial_apicid;  in srat_detect_node()
182 	if (c->extended_cpuid_level < 0x80000008)  in early_init_hygon_mc()
187 	c->x86_max_cores = (ecx & 0xff) + 1;  in early_init_hygon_mc()
194 		while ((1 << bits) < c->x86_max_cores)  in early_init_hygon_mc()
198 	c->x86_coreid_bits = bits;  in early_init_hygon_mc()
249 	rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);  in early_init_hygon()
252 	 * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate  in early_init_hygon()
253 	 * with P/T states and does not stop in deep C-states  in early_init_hygon()
255 	if (c->x86_power & (1 << 8)) {  in early_init_hygon()
261 	if (c->x86_power & BIT(12))  in early_init_hygon()
265 	if (c->x86_power & BIT(14))  in early_init_hygon()
274 	 * ApicID can always be treated as an 8-bit value for Hygon APIC So, we  in early_init_hygon()
306 	c->topo.apicid = read_apic_id();  in init_hygon()
348 	 * Hygon processors have APIC timer running in deep C states.  in init_hygon()
367 	if (c->extended_cpuid_level < 0x80000006)  in cpu_detect_tlb_hygon()