1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <asm/spec-ctrl.h>
19 #include <asm/pci-direct.h>
32  * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX
76  *	and	section 2.6.2 of "AMD-K6 Processor Revision Guide - Model 6"
102 #define CBAR		(0xfffc) /* Configuration Base Address  (32-bit) */  in init_amd_k5()
105 	if (c->x86_model == 9 || c->x86_model == 10) {  in init_amd_k5()
116 	int mbytes = get_num_physpages() >> (20-PAGE_SHIFT);  in init_amd_k6()
118 	if (c->x86_model < 6) {  in init_amd_k6()
119 		/* Based on AMD doc 20734R - June 2000 */  in init_amd_k6()
120 		if (c->x86_model == 0) {  in init_amd_k6()
127 	if (c->x86_model == 6 && c->x86_stepping == 1) {  in init_amd_k6()
133 		pr_info("AMD K6 stepping B detected - ");  in init_amd_k6()
144 		while (n--)  in init_amd_k6()
147 		d = d2-d;  in init_amd_k6()
156 	if (c->x86_model < 8 ||  in init_amd_k6()
157 	   (c->x86_model == 8 && c->x86_stepping < 8)) {  in init_amd_k6()
176 	if ((c->x86_model == 8 && c->x86_stepping > 7) ||  in init_amd_k6()
177 	     c->x86_model == 9 || c->x86_model == 13) {  in init_amd_k6()
198 	if (c->x86_model == 10) {  in init_amd_k6()
216 	if (c->x86_model >= 6 && c->x86_model <= 10) {  in init_amd_k7()
229 	if ((c->x86_model == 8 && c->x86_stepping >= 1) || (c->x86_model > 8)) {  in init_amd_k7()
239 	if (!c->cpu_index)  in init_amd_k7()
247 	if ((c->x86_model == 6) && ((c->x86_stepping == 0) ||  in init_amd_k7()
248 	    (c->x86_stepping == 1)))  in init_amd_k7()
252 	if ((c->x86_model == 7) && (c->x86_stepping == 0))  in init_amd_k7()
259 	 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for  in init_amd_k7()
262 	if (((c->x86_model == 6) && (c->x86_stepping >= 2)) ||  in init_amd_k7()
263 	    ((c->x86_model == 7) && (c->x86_stepping >= 1)) ||  in init_amd_k7()
264 	     (c->x86_model > 7))  in init_amd_k7()
271 	 * Don't taint if we are running SMP kernel on a single non-MP  in init_amd_k7()
289 	for (i = apicid - 1; i >= 0; i--) {  in nearby_node()
304  * Fix up topo::core_id for pre-F17h systems to be in the
305  * [0 .. cores_per_node - 1] range. Not really needed but
312 	if (c->x86 >= 0x17)  in legacy_fixup_core_id()
315 	cus_per_node = c->x86_max_cores / nodes_per_socket;  in legacy_fixup_core_id()
316 	c->topo.core_id %= cus_per_node;  in legacy_fixup_core_id()
321  * (1) AMD multi-node processors
327 	/* get information required for multi-node processors */  in amd_get_topology()
330 		u32 eax, ebx, ecx, edx;  in amd_get_topology()  local
332 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);  in amd_get_topology()
334 		c->topo.die_id  = ecx & 0xff;  in amd_get_topology()
336 		if (c->x86 == 0x15)  in amd_get_topology()
337 			c->topo.cu_id = ebx & 0xff;  in amd_get_topology()
339 		if (c->x86 >= 0x17) {  in amd_get_topology()
340 			c->topo.core_id = ebx & 0xff;  in amd_get_topology()
343 				c->x86_max_cores /= smp_num_siblings;  in amd_get_topology()
352 			c->x86_coreid_bits = get_count_order(c->x86_max_cores);  in amd_get_topology()
360 		c->topo.die_id = value & 7;  in amd_get_topology()
361 		c->topo.llc_id = c->topo.die_id;  in amd_get_topology()
379 	bits = c->x86_coreid_bits;  in amd_detect_cmp()
381 	c->topo.core_id = c->topo.initial_apicid & ((1 << bits)-1);  in amd_detect_cmp()
383 	c->topo.pkg_id = c->topo.initial_apicid >> bits;  in amd_detect_cmp()
385 	c->topo.llc_id = c->topo.die_id = c->topo.pkg_id;  in amd_detect_cmp()
399 	unsigned apicid = c->topo.apicid;  in srat_detect_node()
406 	 * On multi-fabric platform (e.g. Numascale NumaChip) a  in srat_detect_node()
407 	 * platform-specific handler needs to be called to fixup some  in srat_detect_node()
417 		 * - The CPU is missing memory and no node was created.  In  in srat_detect_node()
420 		 * - The APIC IDs differ from the HyperTransport node IDs  in srat_detect_node()
433 		int ht_nodeid = c->topo.initial_apicid;  in srat_detect_node()
448 	unsigned bits, ecx;  in early_init_amd_mc()  local
451 	if (c->extended_cpuid_level < 0x80000008)  in early_init_amd_mc()
454 	ecx = cpuid_ecx(0x80000008);  in early_init_amd_mc()
456 	c->x86_max_cores = (ecx & 0xff) + 1;  in early_init_amd_mc()
459 	bits = (ecx >> 12) & 0xF;  in early_init_amd_mc()
463 		while ((1 << bits) < c->x86_max_cores)  in early_init_amd_mc()
467 	c->x86_coreid_bits = bits;  in early_init_amd_mc()
475 		if (c->x86 > 0x10 ||  in bsp_init_amd()
476 		    (c->x86 == 0x10 && c->x86_model >= 0x2)) {  in bsp_init_amd()
485 	if (c->x86 == 0x15) {  in bsp_init_amd()
493 		va_align.mask	  = (upperbit - 1) & PAGE_MASK;  in bsp_init_amd()
504 		u32 ecx;  in bsp_init_amd()  local
506 		ecx = cpuid_ecx(0x8000001e);  in bsp_init_amd()
507 		__max_die_per_package = nodes_per_socket = ((ecx >> 8) & 7) + 1;  in bsp_init_amd()
517 	    c->x86 >= 0x15 && c->x86 <= 0x17) {  in bsp_init_amd()
520 		switch (c->x86) {  in bsp_init_amd()
540 	switch (c->x86) {  in bsp_init_amd()
542 		switch (c->x86_model) {  in bsp_init_amd()
559 		switch (c->x86_model) {  in bsp_init_amd()
574 		switch (c->x86_model) {  in bsp_init_amd()
593 	WARN_ONCE(1, "Family 0x%x, model: 0x%x??\n", c->x86, c->x86_model);  in bsp_init_amd()
622 		 * will be a value above 32-bits this is still done for  in early_detect_mem_encrypt()
625 		c->x86_phys_bits -= (cpuid_ebx(0x8000001f) >> 6) & 0x3f;  in early_detect_mem_encrypt()
654 	if (c->x86 >= 0xf)  in early_init_amd()
657 	rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);  in early_init_amd()
660 	 * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate  in early_init_amd()
661 	 * with P/T states and does not stop in deep C-states  in early_init_amd()
663 	if (c->x86_power & (1 << 8)) {  in early_init_amd()
669 	if (c->x86_power & BIT(12))  in early_init_amd()
673 	if (c->x86_power & BIT(14))  in early_init_amd()
680 	if (c->x86 == 5)  in early_init_amd()
681 		if (c->x86_model == 13 || c->x86_model == 9 ||  in early_init_amd()
682 		    (c->x86_model == 8 && c->x86_stepping >= 8))  in early_init_amd()
687 	 * ApicID can always be treated as an 8-bit value for AMD APIC versions  in early_init_amd()
693 		if (c->x86 > 0x16)  in early_init_amd()
695 		else if (c->x86 >= 0xf) {  in early_init_amd()
713 	/* F16h erratum 793, CVE-2013-6885 */  in early_init_amd()
714 	if (c->x86 == 0x16 && c->x86_model <= 0xf)  in early_init_amd()
719 	/* Re-enable TopologyExtensions if switched off by BIOS */  in early_init_amd()
720 	if (c->x86 == 0x15 &&  in early_init_amd()
721 	    (c->x86_model >= 0x10 && c->x86_model <= 0x6f) &&  in early_init_amd()
728 				pr_info_once(FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n");  in early_init_amd()
737 		if (c->x86 == 0x17 && boot_cpu_has(X86_FEATURE_AMD_IBPB))  in early_init_amd()
739 		else if (c->x86 >= 0x19 && !wrmsrl_safe(MSR_IA32_PRED_CMD, PRED_CMD_SBPB)) {  in early_init_amd()
761 	if (c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) {  in init_amd_k8()
769 	if (!c->x86_model_id[0])  in init_amd_k8()
770 		strcpy(c->x86_model_id, "Hammer");  in init_amd_k8()
777 	 * Errata 63 for SH-B3 steppings  in init_amd_k8()
790 	if (c->x86_model > 0x41 ||  in init_amd_k8()
791 	    (c->x86_model == 0x41 && c->x86_stepping >= 0x2))  in init_amd_k8()
818 	 * degradation for certain nested-paging guests. Prevent this conversion  in init_amd_gh()
834 	if (c->x86_model > 0x2 ||  in init_amd_gh()
835 	    (c->x86_model == 0x2 && c->x86_stepping >= 0x1))  in init_amd_gh()
853 		return -EINVAL;  in rdrand_cmdline()
858 		return -EINVAL;  in rdrand_cmdline()
875 	 * The self-test can clear X86_FEATURE_RDRAND, so check for  in clear_rdrand_cpuid_bit()
914 	if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {  in init_amd_bd()
951 	 * suppresses non-branch predictions.  in init_spectral_chicken()
1072 	if (c->x86 >= 0x10)  in init_amd()
1080 	c->topo.apicid = read_apic_id();  in init_amd()
1083 	if (c->x86 < 6)  in init_amd()
1086 	switch (c->x86) {  in init_amd()
1112 	if ((c->x86 >= 6) && (!cpu_has(c, X86_FEATURE_XSAVEERPTR)))  in init_amd()
1149 	if (c->x86 > 0x11)  in init_amd()
1167 	    (boot_cpu_has(X86_FEATURE_ZEN1) && c->x86_model > 0x2f))  in init_amd()
1173 	 * Make sure EFER[AIBRSE - Automatic IBRS Enable] is set. The APs are brought up  in init_amd()
1191 	if (c->x86 == 6) {  in amd_size_cache()
1193 		if (c->x86_model == 3 && c->x86_stepping == 0)  in amd_size_cache()
1196 		if (c->x86_model == 4 &&  in amd_size_cache()
1197 			(c->x86_stepping == 0 || c->x86_stepping == 1))  in amd_size_cache()
1206 	u32 ebx, eax, ecx, edx;  in cpu_detect_tlb_amd()  local
1209 	if (c->x86 < 0xf)  in cpu_detect_tlb_amd()
1212 	if (c->extended_cpuid_level < 0x80000006)  in cpu_detect_tlb_amd()
1215 	cpuid(0x80000006, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1224 	if (c->x86 == 0xf) {  in cpu_detect_tlb_amd()
1225 		cpuid(0x80000005, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1241 		if (c->x86 == 0x15 && c->x86_model <= 0x1f) {  in cpu_detect_tlb_amd()
1244 			cpuid(0x80000005, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1261 			  [7] = "486 DX/2-WB",
1263 			  [9] = "486 DX/4-WB",
1264 			  [14] = "Am5x86-WT",
1265 			  [15] = "Am5x86-WB"
1322 	if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) ||  in amd_get_highest_perf()
1323 			       (c->x86_model >= 0x70 && c->x86_model < 0x80)))  in amd_get_highest_perf()
1326 	if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) ||  in amd_get_highest_perf()
1327 			       (c->x86_model >= 0x40 && c->x86_model < 0x70)))  in amd_get_highest_perf()