Lines Matching full:apic
3 * Local APIC handling, local APIC timers
13 * Mikael Pettersson : Power Management for UP-APIC.
52 #include <asm/apic.h>
99 * Hypervisor supports 15 bits of APIC ID in MSI Extended Destination ID
112 * Map cpu index to physical APIC ID
120 /* Local APIC was disabled by the BIOS and enabled by the kernel */
127 * local APIC. Before entering Symmetric I/O Mode, either
133 /* NMI and 8259 INTR go through APIC */ in imcr_pic_to_apic()
145 * Knob to control our willingness to enable the local APIC.
152 * APIC command line parameters
177 /* Disable local APIC timer from the kernel commandline or via dmi quirk */
179 /* Local APIC timer works in C2 */
194 .name = "Local APIC",
211 * Check, if the APIC is integrated or a separate chip
219 * Check, whether this is a modern or a first generation APIC
223 /* AMD systems use old APIC versions, so check the CPU */ in modern_apic()
228 /* Hygon systems use modern APIC */ in modern_apic()
236 * right after this call apic become NOOP driven
237 * so apic->write/read doesn't do anything
280 * - we always have APIC integrated on 64bit mode in lapic_get_maxlvt()
287 * Local APIC timer
298 * This function sets up the local APIC timer, with a timeout of
299 * 'clocks' APIC bus clock. During calibration we actually call
305 * P5 APIC double write bug.
318 * The i82489DX APIC uses bit 18 and 19 for the base divider. This in __setup_APIC_LVTT()
334 * writing to the APIC LVTT and TSC_DEADLINE MSR isn't serialized. in __setup_APIC_LVTT()
421 pr_err(FW_BUG "cpu %d, try to use APIC%lX (LVT offset %d) for " in setup_APIC_eilvt()
429 pr_err(FW_BUG "cpu %d, try to use APIC%lX (LVT offset %d) for " in setup_APIC_eilvt()
502 * Local APIC timer broadcast function
513 * The local apic timer can be used for any function which is CPU local.
589 * Setup the local APIC timer for this CPU. Copy the initialized values
642 * In this functions we calibrate APIC bus clocks to the external timer.
645 * irqs synchronous. CPUs connected by the same APIC bus have the very same bus
729 pr_warn("APIC calibration not consistent " in calibrate_by_pmtimer()
735 pr_info("APIC delta adjusted to PM-Timer: " in calibrate_by_pmtimer()
774 * and apic timer calibration. in apic_needs_pit()
779 /* Is there an APIC at all or is it disabled? */ in apic_needs_pit()
785 * configuration, the local APIC timer won't be set up. Make sure in apic_needs_pit()
800 /* APIC timer disabled? */ in apic_needs_pit()
804 * The APIC timer frequency is known already, no PIT calibration in apic_needs_pit()
832 * local APIC timer, no need for broadcast timer. in calibrate_APIC_clock()
838 apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n" in calibrate_APIC_clock()
839 "calibrating APIC timer ...\n"); in calibrate_APIC_clock()
849 * Setup the APIC counter to maximum. There is no way the lapic in calibrate_APIC_clock()
900 /* Build delta t1-t2 as apic timer counts down */ in calibrate_APIC_clock()
931 * Do a sanity check on the APIC calibration result in calibrate_APIC_clock()
935 pr_warn("APIC frequency too slow, disabling apic timer\n"); in calibrate_APIC_clock()
942 * PM timer calibration failed or not turned on so lets try APIC in calibrate_APIC_clock()
947 apic_printk(APIC_VERBOSE, "... verify APIC timer\n"); in calibrate_APIC_clock()
950 * Setup the apic timer manually in calibrate_APIC_clock()
979 pr_warn("APIC timer disabled due to verification failure\n"); in calibrate_APIC_clock()
987 * Setup the boot APIC
994 * The local apic timer can be disabled via the kernel in setup_boot_APIC_clock()
1000 pr_info("Disabling APIC timer\n"); in setup_boot_APIC_clock()
1035 * The guts of the apic timer interrupt
1069 * Local APIC timer interrupt. This is the most natural way for doing
1071 * broadcast interrupts too. [in case the hw doesn't support APIC timers]
1089 * Local APIC start and shutdown
1093 * clear_local_APIC - shutdown the local APIC
1096 * the local APIC has no dangling leftovers. Also used to cleanout any BIOS
1109 * Masking an LVT entry can trigger a local APIC error in clear_local_APIC()
1147 * Clean APIC state for other OSs: in clear_local_APIC()
1157 /* Integrated APIC (!82489DX) ? */ in clear_local_APIC()
1167 * apic_soft_disable - Clears and software disables the local APIC on hotplug
1170 * MSR_IA32_APICBASE. Clearing that bit on systems based on the 3 wire APIC
1171 * bus would require a hardware reset as the APIC would lose track of bus
1173 * but it has to be guaranteed that no interrupt is sent to the APIC while
1183 /* Soft disable APIC (implies clearing of registers for 82489DX!). */ in apic_soft_disable()
1190 * disable_local_APIC - clear and disable the local APIC
1241 * sync_Arb_IDs - synchronize APIC bus arbitration IDs
1268 pr_info("APIC disabled via kernel command line\n"); in __apic_intr_mode_select()
1274 /* On 64-bit, the APIC must be integrated, Check local APIC only */ in __apic_intr_mode_select()
1277 pr_info("APIC disabled by BIOS\n"); in __apic_intr_mode_select()
1281 /* On 32-bit, the APIC may be integrated APIC or 82489DX */ in __apic_intr_mode_select()
1283 /* Neither 82489DX nor integrated APIC ? */ in __apic_intr_mode_select()
1289 /* If the BIOS pretends there is an integrated APIC ? */ in __apic_intr_mode_select()
1293 pr_err(FW_BUG "Local APIC not detected, force emulation\n"); in __apic_intr_mode_select()
1302 pr_info("APIC: ACPI MADT or MP tables are not detected\n"); in __apic_intr_mode_select()
1311 pr_info("APIC: SMP mode deactivated\n"); in __apic_intr_mode_select()
1334 * through-I/O-APIC virtual wire mode might be active. in init_bsp_APIC()
1340 * Do not trust the local APIC being empty at bootup. in init_bsp_APIC()
1345 * Enable APIC. in init_bsp_APIC()
1383 pr_info("APIC: Keep in PIC mode(8259)\n"); in apic_intr_mode_init()
1386 pr_info("APIC: Switch to virtual wire mode setup\n"); in apic_intr_mode_init()
1389 pr_info("APIC: Switch to virtual wire mode setup with no configuration\n"); in apic_intr_mode_init()
1393 pr_info("APIC: Switch to symmetric I/O mode setup\n"); in apic_intr_mode_init()
1396 pr_info("APIC: Switch to symmetric I/O mode setup in no SMP routine\n"); in apic_intr_mode_init()
1419 if (apic->disable_esr) { in lapic_setup_esr()
1473 * If the ISR map is not empty. ACK the APIC and run another round in apic_check_and_ack()
1510 /* 512 loops are way oversized and give the APIC a chance to obey. */ in apic_pending_intr_clear()
1516 pr_warn("APIC: Stale IRR: %256pb ISR: %256pb\n", irr.map, isr.map); in apic_pending_intr_clear()
1520 * setup_local_APIC - setup the local APIC
1522 * Used to setup local APIC while initializing BSP or bringing up APs.
1536 * If this comes from kexec/kcrash the APIC might be enabled in in setup_local_APIC()
1545 if (lapic_is_integrated() && apic->disable_esr) { in setup_local_APIC()
1552 /* Validate that the APIC is registered if required */ in setup_local_APIC()
1553 BUG_ON(apic->apic_id_registered && !apic->apic_id_registered()); in setup_local_APIC()
1557 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel in setup_local_APIC()
1562 if (apic->init_apic_ldr) in setup_local_APIC()
1563 apic->init_apic_ldr(); in setup_local_APIC()
1566 * Set Task Priority to 'accept all except vectors 0-31'. An APIC in setup_local_APIC()
1580 * Now that we are all set up, enable the APIC in setup_local_APIC()
1585 * Enable APIC in setup_local_APIC()
1591 * Some unknown Intel IO/APIC (or APIC) errata is biting us with in setup_local_APIC()
1628 * set up through-local-APIC on the boot CPU's LINT0. This is not in setup_local_APIC()
1633 * TODO: set up through-local-APIC from through-I/O-APIC? --macro in setup_local_APIC()
1661 /* Recheck CMCI information after local APIC is up on CPU #0 */ in setup_local_APIC()
1674 /* Disable the local apic timer */ in end_local_APIC_setup()
1685 * APIC setup function for application processors. Called from smpboot.c
1698 * This can be invoked from check_x2apic() before the APIC has been in apic_read_boot_cpu_id()
1776 pr_warn("APIC locked in x2apic mode, can't disable\n"); in setup_nox2apic()
1793 * Try to make the AP's APIC state match that of the BSP, but if the in x2apic_setup()
1866 * MSI, that increases the maximum APIC ID that can be in try_to_enable_x2apic()
1876 * in physical mode, and CPUs with an APIC ID that cannot in try_to_enable_x2apic()
1905 * Checkme: Can we simply turn off x2APIC here instead of disabling the APIC? in check_x2apic()
1908 pr_err("Disabling APIC, expect reduced performance and functionality.\n"); in check_x2apic()
1924 pr_info("Not enabling interrupt remapping due to skipped IO-APIC setup\n"); in enable_IR_x2apic()
1934 pr_info("Saving IO-APIC state failed: %d\n", ret); in enable_IR_x2apic()
1958 * On AMD64 we trust the BIOS - if it says no APIC it is likely
1959 * not correctly set up (usually the APIC timer won't work etc.)
1964 pr_info("No local APIC present\n"); in detect_init_APIC()
1978 * The APIC feature bit should now be enabled in apic_verify()
1983 pr_warn("Could not enable APIC!\n"); in apic_verify()
1988 /* The BIOS may have set up the APIC at some other address */ in apic_verify()
1996 pr_info("Found and enabled local APIC!\n"); in apic_verify()
2008 * Some BIOSes disable the local APIC in the APIC_BASE in apic_force_enable()
2015 pr_info("Local APIC disabled by BIOS -- reenabling.\n"); in apic_force_enable()
2026 * Detect and initialize APIC
2053 * Over-ride BIOS and try to enable the local APIC only if in detect_init_APIC()
2057 pr_info("Local APIC disabled by BIOS -- " in detect_init_APIC()
2073 pr_info("No local APIC present or hardware disabled\n"); in detect_init_APIC()
2079 * init_apic_mappings - initialize APIC mappings
2091 pr_info("APIC: disable apic facility\n"); in init_apic_mappings()
2102 apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", in apic_set_fixmap()
2118 * Local APIC interrupts
2138 pr_info("Spurious APIC interrupt (vector 0xFF) on CPU#%d, should never happen.\n", in handle_spurious_interrupt()
2180 * This interrupt should never happen with our APIC/SMP architecture
2185 "Send CS error", /* APIC Error Bit 0 */ in DEFINE_IDTENTRY_SYSVEC()
2186 "Receive CS error", /* APIC Error Bit 1 */ in DEFINE_IDTENTRY_SYSVEC()
2187 "Send accept error", /* APIC Error Bit 2 */ in DEFINE_IDTENTRY_SYSVEC()
2188 "Receive accept error", /* APIC Error Bit 3 */ in DEFINE_IDTENTRY_SYSVEC()
2189 "Redirectable IPI", /* APIC Error Bit 4 */ in DEFINE_IDTENTRY_SYSVEC()
2190 "Send illegal vector", /* APIC Error Bit 5 */ in DEFINE_IDTENTRY_SYSVEC()
2191 "Received illegal vector", /* APIC Error Bit 6 */ in DEFINE_IDTENTRY_SYSVEC()
2192 "Illegal register address", /* APIC Error Bit 7 */ in DEFINE_IDTENTRY_SYSVEC()
2205 apic_printk(APIC_DEBUG, KERN_DEBUG "APIC error on CPU%d: %02x", in DEFINE_IDTENTRY_SYSVEC()
2222 * connect_bsp_APIC - attach the APIC to the interrupt system
2229 * Do not trust the local APIC being empty at bootup. in connect_bsp_APIC()
2233 * PIC mode, enable APIC mode in the IMCR, i.e. connect BSP's in connect_bsp_APIC()
2234 * local APIC to INT and NMI lines. in connect_bsp_APIC()
2237 "enabling APIC mode.\n"); in connect_bsp_APIC()
2244 * disconnect_bsp_APIC - detach the APIC from the interrupt system
2248 * APIC is disabled.
2258 * certain older boards). Note that APIC interrupts, including in disconnect_bsp_APIC()
2262 apic_printk(APIC_VERBOSE, "disabling APIC mode, " in disconnect_bsp_APIC()
2319 * Used to store mapping between logical CPU IDs and APIC IDs.
2384 WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %u reached. " in allocate_logical_cpuid()
2421 panic("Boot CPU APIC not registered yet\n"); in generic_processor_info()
2429 pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", in generic_processor_info()
2439 pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. " in generic_processor_info()
2463 msg->arch_addr_lo.dest_mode_logical = apic->dest_mode_logical; in __irq_msi_compose_msg()
2472 * APIC ID into the high bits of the address. Anything else would in __irq_msi_compose_msg()
2477 * 5-11 to be used, giving support for 15 bits of APIC IDs in total. in __irq_msi_compose_msg()
2500 apic_write(APIC_ID, apic->set_apic_id(boot_cpu_physical_apicid)); in apic_bsp_up_setup()
2506 * apic_bsp_setup - Setup function for local apic and io-apic
2541 * 'active' is true if the local APIC was enabled by us and
2546 /* r/w apic fields */
2598 * Mask IOAPIC before disabling the local APIC to prevent stale IRR in lapic_suspend()
2623 * IO-APIC and PIC have their own resume routines. in lapic_resume()
2705 /* local apic needs to resume before other devices access its registers. */
2723 pr_info("APIC: %s detected, Multi Chassis\n", d->ident); in set_multi()
2765 * APIC command line parameters
2819 pr_warn("APIC Verbosity level %s not recognised" in apic_set_verbosity()
2820 " use apic=verbose or apic=debug\n", arg); in apic_set_verbosity()
2827 early_param("apic", apic_set_verbosity);
2834 /* Put local APIC into the resource map. */ in lapic_insert_resource()