include/asm/special_insns.h

1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <asm/processor-flags.h>
15  * other: they should execute in program order. However GCC 4.9.x and 5.x have
62 	 * This could fault if CR4 does not exist.  Non-existent CR4  in native_read_cr4()
89 	asm volatile(".byte 0x0f,0x01,0xee\n\t"  in rdpkru()
103 	asm volatile(".byte 0x0f,0x01,0xef\n\t"  in wrpkru()
185 	alternative_io(".byte 0x3e; clflush %P0",  in clflushopt()
186 		       ".byte 0x66; clflush %P0",  in clflushopt()
196 		".byte 0x3e; clflush (%[pax])",  in clwb()
197 		".byte 0x66; clflush (%[pax])", /* clflushopt (%%rax) */  in clwb()
199 		".byte 0x66, 0x0f, 0xae, 0x30",  /* clwb (%%rax) */  in clwb()
214 	return -EFAULT;  in write_user_shstk_64()
223 	asm volatile(".byte 0xf, 0x1, 0xe8" ::: "memory");  in serialize()
226 /* The dst parameter must be 64-bytes aligned */
235 	 * Both __src and __dst must be memory constraints in order to tell the  in movdir64b()
243 	asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"  in movdir64b()
249  * enqcmds - Enqueue a command in supervisor (CPL0) mode
250  * @dst: destination, in MMIO space (must be 512-bit aligned)
253  * The ENQCMDS instruction allows software to write a 512-bit command to
254  * a 512-bit-aligned special MMIO region that supports the instruction.
259  * kernel space to MMIO space, in a unit of 512 bits. Order of data access
261  * returns 0 on success and -EAGAIN on failure.
278 	asm volatile(".byte 0xf3, 0x0f, 0x38, 0xf8, 0x02, 0x66, 0x90"  in enqcmds()
285 		return -EAGAIN;  in enqcmds()
296 	asm volatile(".byte 0xc4, 0xe2, 0x78, 0x49, 0xc0");  in tile_release()