Lines Matching full:isa
41 /* Host ISA bitmap */
44 /* Per-cpu ISA extensions. */
55 * @isa_bitmap: ISA bitmap to use
58 * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
72 * @isa_bitmap: ISA bitmap to use
76 * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
94 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_isa_extension_check()
103 pr_err("Zicboz detected in ISA string, disabling as no cboz-block-size found\n"); in riscv_isa_extension_check()
207 * privileged ISA, the existence of the CSRs is implied by any extension which
208 * specifies [ms]envcfg bit(s). Hence, we define a custom ISA extension for the
216 * The canonical order of ISA extension names in the ISA string is defined in
220 * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo.
331 * If this is a bundle, enable all the ISA extensions that in match_isa_ext()
337 set_bit(ext->subset_ext_ids[i], isainfo->isa); in match_isa_ext()
346 set_bit(ext->id, isainfo->isa); in match_isa_ext()
351 unsigned long *isa2hwcap, const char *isa) in riscv_parse_isa_string() argument
359 isa += 4; in riscv_parse_isa_string()
361 while (*isa) { in riscv_parse_isa_string()
362 const char *ext = isa++; in riscv_parse_isa_string()
363 const char *ext_end = isa; in riscv_parse_isa_string()
371 * not valid ISA extensions. It works unless the first in riscv_parse_isa_string()
372 * multi-letter extension in the ISA string begins with in riscv_parse_isa_string()
376 ++isa; in riscv_parse_isa_string()
405 for (; *isa && *isa != '_'; ++isa) in riscv_parse_isa_string()
406 if (unlikely(!isalnum(*isa))) in riscv_parse_isa_string()
409 ext_end = isa; in riscv_parse_isa_string()
435 * ensure that, when isa was incremented at the start of the loop, in riscv_parse_isa_string()
453 if (!isdigit(*isa)) in riscv_parse_isa_string()
456 while (isdigit(*++isa)) in riscv_parse_isa_string()
459 if (tolower(*isa) != 'p') in riscv_parse_isa_string()
462 if (!isdigit(*++isa)) { in riscv_parse_isa_string()
463 --isa; in riscv_parse_isa_string()
467 while (isdigit(*++isa)) in riscv_parse_isa_string()
474 * The parser expects that at the start of an iteration isa points to the in riscv_parse_isa_string()
479 if (*isa == '_') in riscv_parse_isa_string()
480 ++isa; in riscv_parse_isa_string()
489 set_bit(nr, isainfo->isa); in riscv_parse_isa_string()
501 const char *isa; in riscv_fill_hwcap_from_isa_string() local
524 rc = of_property_read_string(node, "riscv,isa", &isa); in riscv_fill_hwcap_from_isa_string()
527 pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); in riscv_fill_hwcap_from_isa_string()
531 rc = acpi_get_riscv_isa(rhct, cpu, &isa); in riscv_fill_hwcap_from_isa_string()
533 pr_warn("Unable to get ISA for the hart - %d\n", cpu); in riscv_fill_hwcap_from_isa_string()
538 riscv_parse_isa_string(&this_hwcap, isainfo, isa2hwcap, isa); in riscv_fill_hwcap_from_isa_string()
541 * These ones were as they were part of the base ISA when the in riscv_fill_hwcap_from_isa_string()
543 * unconditionally where `i` is in riscv,isa on DT systems. in riscv_fill_hwcap_from_isa_string()
546 set_bit(RISCV_ISA_EXT_ZICSR, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
547 set_bit(RISCV_ISA_EXT_ZIFENCEI, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
548 set_bit(RISCV_ISA_EXT_ZICNTR, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
549 set_bit(RISCV_ISA_EXT_ZIHPM, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
553 * "V" in ISA strings is ambiguous in practice: it should mean in riscv_fill_hwcap_from_isa_string()
563 clear_bit(RISCV_ISA_EXT_v, isainfo->isa); in riscv_fill_hwcap_from_isa_string()
567 * All "okay" hart should have same isa. Set HWCAP based on in riscv_fill_hwcap_from_isa_string()
577 bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_isa_string()
579 bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_isa_string()
601 if (!of_property_present(cpu_node, "riscv,isa-extensions")) { in riscv_fill_hwcap_from_ext_list()
609 if (of_property_match_string(cpu_node, "riscv,isa-extensions", in riscv_fill_hwcap_from_ext_list()
616 set_bit(ext->subset_ext_ids[j], isainfo->isa); in riscv_fill_hwcap_from_ext_list()
621 set_bit(ext->id, isainfo->isa); in riscv_fill_hwcap_from_ext_list()
632 * All "okay" harts should have same isa. Set HWCAP based on in riscv_fill_hwcap_from_ext_list()
641 bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_ext_list()
643 bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_ext_list()
684 pr_info("Falling back to deprecated \"riscv,isa\"\n"); in riscv_fill_hwcap()
701 * ISA string in device tree might have 'v' flag, but in riscv_fill_hwcap()
713 pr_info("riscv: base ISA extensions %s\n", print_str); in riscv_fill_hwcap()
1033 WARN(1, "This extension id:%d is not in ISA extension list", id); in riscv_cpufeature_patch_func()