dts/sophgo/sg2042.dtsi

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/interrupt-controller/irq.h>
9 #include "sg2042-cpus.dtsi"
13 	#address-cells = <2>;
14 	#size-cells = <2>;
15 	dma-noncoherent;
22 		compatible = "simple-bus";
23 		#address-cells = <2>;
24 		#size-cells = <2>;
27 		clint_mswi: interrupt-controller@7094000000 {
28 			compatible = "sophgo,sg2042-aclint-mswi", "thead,c900-aclint-mswi";
30 			interrupts-extended = <&cpu0_intc 3>,
97 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
99 			reg-names = "mtimecmp";
100 			interrupts-extended = <&cpu0_intc 7>,
107 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
109 			reg-names = "mtimecmp";
110 			interrupts-extended = <&cpu4_intc 7>,
117 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
119 			reg-names = "mtimecmp";
120 			interrupts-extended = <&cpu8_intc 7>,
127 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
129 			reg-names = "mtimecmp";
130 			interrupts-extended = <&cpu12_intc 7>,
137 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
139 			reg-names = "mtimecmp";
140 			interrupts-extended = <&cpu16_intc 7>,
147 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
149 			reg-names = "mtimecmp";
150 			interrupts-extended = <&cpu20_intc 7>,
157 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
159 			reg-names = "mtimecmp";
160 			interrupts-extended = <&cpu24_intc 7>,
167 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
169 			reg-names = "mtimecmp";
170 			interrupts-extended = <&cpu28_intc 7>,
177 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
179 			reg-names = "mtimecmp";
180 			interrupts-extended = <&cpu32_intc 7>,
187 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
189 			reg-names = "mtimecmp";
190 			interrupts-extended = <&cpu36_intc 7>,
197 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
199 			reg-names = "mtimecmp";
200 			interrupts-extended = <&cpu40_intc 7>,
207 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
209 			reg-names = "mtimecmp";
210 			interrupts-extended = <&cpu44_intc 7>,
217 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
219 			reg-names = "mtimecmp";
220 			interrupts-extended = <&cpu48_intc 7>,
227 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
229 			reg-names = "mtimecmp";
230 			interrupts-extended = <&cpu52_intc 7>,
237 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
239 			reg-names = "mtimecmp";
240 			interrupts-extended = <&cpu56_intc 7>,
247 			compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
249 			reg-names = "mtimecmp";
250 			interrupts-extended = <&cpu60_intc 7>,
256 		intc: interrupt-controller@7090000000 {
257 			compatible = "sophgo,sg2042-plic", "thead,c900-plic";
258 			#address-cells = <0>;
259 			#interrupt-cells = <2>;
261 			interrupt-controller;
262 			interrupts-extended =
331 			compatible = "snps,dw-apb-uart";
333 			interrupt-parent = <&intc>;
335 			clock-frequency = <500000000>;
336 			reg-shift = <2>;
337 			reg-io-width = <4>;