Lines Matching +full:0 +full:- +full:7
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/interrupt-controller/irq.h>
9 #include "sg2042-cpus.dtsi"
13 #address-cells = <2>;
14 #size-cells = <2>;
15 dma-noncoherent;
22 compatible = "simple-bus";
23 #address-cells = <2>;
24 #size-cells = <2>;
27 clint_mswi: interrupt-controller@7094000000 {
28 compatible = "sophgo,sg2042-aclint-mswi", "thead,c900-aclint-mswi";
29 reg = <0x00000070 0x94000000 0x00000000 0x00004000>;
30 interrupts-extended = <&cpu0_intc 3>,
97 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
98 reg = <0x00000070 0xac004000 0x00000000 0x0000c000>;
99 reg-names = "mtimecmp";
100 interrupts-extended = <&cpu0_intc 7>,
101 <&cpu1_intc 7>,
102 <&cpu2_intc 7>,
103 <&cpu3_intc 7>;
107 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
108 reg = <0x00000070 0xac014000 0x00000000 0x0000c000>;
109 reg-names = "mtimecmp";
110 interrupts-extended = <&cpu4_intc 7>,
111 <&cpu5_intc 7>,
112 <&cpu6_intc 7>,
113 <&cpu7_intc 7>;
117 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
118 reg = <0x00000070 0xac024000 0x00000000 0x0000c000>;
119 reg-names = "mtimecmp";
120 interrupts-extended = <&cpu8_intc 7>,
121 <&cpu9_intc 7>,
122 <&cpu10_intc 7>,
123 <&cpu11_intc 7>;
127 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
128 reg = <0x00000070 0xac034000 0x00000000 0x0000c000>;
129 reg-names = "mtimecmp";
130 interrupts-extended = <&cpu12_intc 7>,
131 <&cpu13_intc 7>,
132 <&cpu14_intc 7>,
133 <&cpu15_intc 7>;
137 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
138 reg = <0x00000070 0xac044000 0x00000000 0x0000c000>;
139 reg-names = "mtimecmp";
140 interrupts-extended = <&cpu16_intc 7>,
141 <&cpu17_intc 7>,
142 <&cpu18_intc 7>,
143 <&cpu19_intc 7>;
147 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
148 reg = <0x00000070 0xac054000 0x00000000 0x0000c000>;
149 reg-names = "mtimecmp";
150 interrupts-extended = <&cpu20_intc 7>,
151 <&cpu21_intc 7>,
152 <&cpu22_intc 7>,
153 <&cpu23_intc 7>;
157 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
158 reg = <0x00000070 0xac064000 0x00000000 0x0000c000>;
159 reg-names = "mtimecmp";
160 interrupts-extended = <&cpu24_intc 7>,
161 <&cpu25_intc 7>,
162 <&cpu26_intc 7>,
163 <&cpu27_intc 7>;
167 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
168 reg = <0x00000070 0xac074000 0x00000000 0x0000c000>;
169 reg-names = "mtimecmp";
170 interrupts-extended = <&cpu28_intc 7>,
171 <&cpu29_intc 7>,
172 <&cpu30_intc 7>,
173 <&cpu31_intc 7>;
177 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
178 reg = <0x00000070 0xac084000 0x00000000 0x0000c000>;
179 reg-names = "mtimecmp";
180 interrupts-extended = <&cpu32_intc 7>,
181 <&cpu33_intc 7>,
182 <&cpu34_intc 7>,
183 <&cpu35_intc 7>;
187 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
188 reg = <0x00000070 0xac094000 0x00000000 0x0000c000>;
189 reg-names = "mtimecmp";
190 interrupts-extended = <&cpu36_intc 7>,
191 <&cpu37_intc 7>,
192 <&cpu38_intc 7>,
193 <&cpu39_intc 7>;
197 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
198 reg = <0x00000070 0xac0a4000 0x00000000 0x0000c000>;
199 reg-names = "mtimecmp";
200 interrupts-extended = <&cpu40_intc 7>,
201 <&cpu41_intc 7>,
202 <&cpu42_intc 7>,
203 <&cpu43_intc 7>;
207 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
208 reg = <0x00000070 0xac0b4000 0x00000000 0x0000c000>;
209 reg-names = "mtimecmp";
210 interrupts-extended = <&cpu44_intc 7>,
211 <&cpu45_intc 7>,
212 <&cpu46_intc 7>,
213 <&cpu47_intc 7>;
217 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
218 reg = <0x00000070 0xac0c4000 0x00000000 0x0000c000>;
219 reg-names = "mtimecmp";
220 interrupts-extended = <&cpu48_intc 7>,
221 <&cpu49_intc 7>,
222 <&cpu50_intc 7>,
223 <&cpu51_intc 7>;
227 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
228 reg = <0x00000070 0xac0d4000 0x00000000 0x0000c000>;
229 reg-names = "mtimecmp";
230 interrupts-extended = <&cpu52_intc 7>,
231 <&cpu53_intc 7>,
232 <&cpu54_intc 7>,
233 <&cpu55_intc 7>;
237 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
238 reg = <0x00000070 0xac0e4000 0x00000000 0x0000c000>;
239 reg-names = "mtimecmp";
240 interrupts-extended = <&cpu56_intc 7>,
241 <&cpu57_intc 7>,
242 <&cpu58_intc 7>,
243 <&cpu59_intc 7>;
247 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
248 reg = <0x00000070 0xac0f4000 0x00000000 0x0000c000>;
249 reg-names = "mtimecmp";
250 interrupts-extended = <&cpu60_intc 7>,
251 <&cpu61_intc 7>,
252 <&cpu62_intc 7>,
253 <&cpu63_intc 7>;
256 intc: interrupt-controller@7090000000 {
257 compatible = "sophgo,sg2042-plic", "thead,c900-plic";
258 #address-cells = <0>;
259 #interrupt-cells = <2>;
260 reg = <0x00000070 0x90000000 0x00000000 0x04000000>;
261 interrupt-controller;
262 interrupts-extended =
331 compatible = "snps,dw-apb-uart";
332 reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
333 interrupt-parent = <&intc>;
335 clock-frequency = <500000000>;
336 reg-shift = <2>;
337 reg-io-width = <4>;