Lines Matching +full:isa +full:- +full:extensions

1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
177 # https://github.com/llvm/llvm-project/commit/6ab8927931851bb42b2c93a00801dc499d7d9b1e
184 depends on $(cc-option,-fpatchable-function-entry=8)
187 def_bool $(cc-option,-fsanitize=shadow-call-stack)
188 …# https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444…
189 depends on $(ld-option,--no-relax-gp)
193 # https://github.com/llvm/llvm-project/commit/6611d58f5bbcbec77262d392e2923e1d680f6985
196 # https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6
200 # https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a
202 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77
213 # VA_BITS - PAGE_SHIFT - 3
226 # set if we are running in S-mode and can use SBI calls
233 bool "MMU-based Paged Memory Management Support"
236 Select if you want MMU-based virtualised addressing space
308 This enables function pointer support for non-standard noncoherent
312 def_bool $(as-instr,.insn r 51$(comma) 0$(comma) 0$(comma) t0$(comma) t0$(comma) zero)
317 depends on $(as-instr, .option arch$(comma) +m)
325 bool "Allow configurations that result in non-portable kernels"
327 RISC-V kernel binaries are compatible between all known systems
340 prompt "Base ISA"
343 This selects the base ISA that this kernel will target and must match
382 bool "Symmetric Multi-Processing"
395 bool "Multi-core scheduler support"
398 Multi-core scheduler support improves the CPU scheduler's decision
399 making when dealing with multi-core CPU chips at a cost of slightly
403 int "Maximum number of CPUs (2-512)"
412 bool "Support for hot-pluggable CPUs"
443 Enable NUMA (Non-Uniform Memory Access) support.
476 Adds "C" to the ISA subsets that the toolchain is allowed to emit
488 Allow kernel to detect the Svnapot ISA-extension dynamically at boot
492 of contiguous virtual-to-physical translations for a naturally
493 aligned power-of-2 (NAPOT) granularity larger than the base 4KB page
502 bool "Svpbmt extension support for supervisor mode page-based memory types"
508 ISA-extension (Supervisor-mode: page-based memory types) and
515 The Svpbmt extension is only available on 64-bit cpus.
522 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64iv)
523 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32iv)
559 bool "Run kernel-mode Vector with kernel preemption"
564 Usually, in-kernel SIMD routines are run with preemption disabled.
570 consumption due to the allocation of per-task's kernel Vector context.
575 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb)
576 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb)
591 of bit-specific operations (count bit population, sign extending,
597 bool "Zicbom extension support for non-coherent DMA operation"
609 non-coherent DMA support on devices that need it.
629 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zihintpause)
630 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zihintpause)
635 …# https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6…
639 Binutils-2.38 and GCC-12.1.0 bumped the default ISA spec to the newer
641 the Zicsr and Zifencei extensions. This requires explicitly specifying
645 newer ISA spec to version 2.2, relax the check to binutils >= 2.36.
652 # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16
657 -march. This option causes an older ISA spec compatible with these older
659 as passing zicsr and zifencei to -march.
665 Say N here if you want to disable all floating-point related procedure
680 int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT
723 deprecated in future once legacy M-mode software are no longer in use.
734 scheme. It should be only enabled for M-mode Linux or platforms relying
772 bool "Kernel support for 32-bit U-mode"
776 This option enables support for a 32-bit U-mode running under a 64-bit
777 kernel at S-mode. riscv32-specific components such as system calls,
781 If you want to execute 32-bit userspace applications, say Y.
826 random u64 value in /chosen/kaslr-seed at kernel entry.
840 string "Built-in kernel command line"
843 are provided at run-time, during boot. However, there are cases
847 When that occurs, it is possible to define a built-in command
851 prompt "Built-in command line usage" if CMDLINE != ""
854 Choose how the kernel will handle the provided built-in command
860 Use the built-in command line as fallback in case we get nothing
866 The command-line arguments provided during boot will be
867 appended to the built-in command line. This is useful in
874 Always use the built-in command line, even if we get one during
899 by UEFI firmware (such as non-volatile variables, realtime
905 …def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-
923 explicitly specified to run early relocations of read-write data
927 bool "Kernel Execute-In-Place from ROM"
934 Execute-In-Place allows the kernel to run from non-volatile storage
937 to RAM. Read-write sections, such as the data section and stack,
965 bool "Permit falling back to parsing riscv,isa for extension support by default"
968 Parsing the "riscv,isa" devicetree property has been deprecated and
971 "riscv,isa" property if the replacements are not found.
977 Please see the dt-binding, located at
978 Documentation/devicetree/bindings/riscv/extensions.yaml for details
979 on the replacement properties, "riscv,isa-base" and
980 "riscv,isa-extensions".
983 bool "Built-in device tree"