1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #define PM_PMC_SH	20	/* PMC number (1-based) for direct events */
21 #define PM_UNIT_SH	16	/* TTMMUX number and setting - unit select */
23 #define PM_BYTE_SH	12	/* Byte number of event bus to use */
34 #define PM_ISU1		3
49 #define MMCR1_TTMSEL_MSK	3
55 #define MMCR1_GRS_L2SEL_MSK	3
57 #define MMCR1_GRS_L3SEL_MSK	3
61 #define MMCR1_GRS_FABSEL_MSK	3
70 #define MMCR1_PMCSEL_SH(n)	(MMCR1_PMC1SEL_SH - (n) * 8)
80  * NC - number of counters
82  *     48-50: number of events needing PMC1-4 0x0007_0000_0000_0000
84  * G0..G3 - GRS mux constraints
85  *     46-47: GRS_L2SEL value
86  *     44-45: GRS_L3SEL value
87  *     41-44: GRS_MCSEL value
88  *     39-40: GRS_FABSEL value
91  * T0 - TTM0 constraint
92  *     36-37: TTM0SEL value (0=FPU, 2=IFU, 3=ISU1) 0x30_0000_0000
94  * T1 - TTM1 constraint
95  *     34-35: TTM1SEL value (0=IDU, 3=GRS) 0x0c_0000_0000
97  * UC - unit constraint: can't have all three of FPU|IFU|ISU1, ISU0, IDU|GRS
104  *     24-27: Byte 0 event source 0x0f00_0000
108  *     20-23, 16-19, 12-15: Byte 1, 2, 3 event sources
112  *     10-11: Count of events needing PMC6
115  *     0-9: Count of events needing PMC1..PMC5
137 	int pmc, byte, unit, sh;  in power5p_get_constraint()  local
144 			return -1;  in power5p_get_constraint()
145 		sh = (pmc - 1) * 2;  in power5p_get_constraint()
149 			return -1;  in power5p_get_constraint()
154 			return -1;  in power5p_get_constraint()
159 		byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;  in power5p_get_constraint()
160 		if (byte >= 4) {  in power5p_get_constraint()
162 				return -1;  in power5p_get_constraint()
163 			/* Map LSU1 low word (bytes 4-7) to unit LSU1+1 */  in power5p_get_constraint()
165 			byte &= 3;  in power5p_get_constraint()
169 			fmask = (bit == 6)? 7: 3;  in power5p_get_constraint()
175 		/* Set byte lane select field */  in power5p_get_constraint()
176 		mask  |= 0xfUL << (24 - 4 * byte);  in power5p_get_constraint()
177 		value |= (unsigned long)unit << (24 - 4 * byte);  in power5p_get_constraint()
180 		/* need a counter from PMC1-4 set */  in power5p_get_constraint()
196 #define MAX_ALT	3	/* at most 3 alternatives for any event */
214  * index into the alternatives table if found, else -1.
227 	return -1;  in find_alternative()
233 	/* PMC 3 */	{ 0x20, 0x22, 0x24, 0x26 },
238  * Some direct events for decodes of event bus byte 3 have alternative
240  * event code for those that do, or -1 otherwise.  This also handles
249 		return -1;  in find_alternative_bdecode()
250 	altpmc = 5 - pmc;	/* 1 <-> 4, 2 <-> 3 */  in find_alternative_bdecode()
253 		if (bytedecode_alternatives[pmc - 1][j] == pp) {  in find_alternative_bdecode()
256 				bytedecode_alternatives[altpmc - 1][j];  in find_alternative_bdecode()
262 		return event + (2 << PM_PMC_SH) + (0x2e - 0x0d);  in find_alternative_bdecode()
263 	if (pmc == 3 && (pp == 0x2e || pp == 0x2f))  in find_alternative_bdecode()
264 		return event - (2 << PM_PMC_SH) - (0x2e - 0x0d);  in find_alternative_bdecode()
271 	return -1;  in find_alternative_bdecode()
306 		 * we never end up with more than 3 alternatives for any event.  in power5p_get_alternatives()
360  * The 0x80 bit indicates a byte decode PMCSEL value.
371 	0, 0, 0,/* 08 - 0a */
406 	int bit, byte, unit;  in power5p_marked_instr_event()  local
414 	bit = -1;  in power5p_marked_instr_event()
421 			bit = pmc - 1;  in power5p_marked_instr_event()
423 			bit = 4 - pmc;  in power5p_marked_instr_event()
424 		else if (psel == 0x1b && (pmc == 1 || pmc == 3))  in power5p_marked_instr_event()
429 		bit = pmc - 1;  in power5p_marked_instr_event()
430 	} else if (pmc == 3 && (psel == 0x2e || psel == 0x2f)) {  in power5p_marked_instr_event()
434 	if (!(event & PM_BUSEVENT_MSK) || bit == -1)  in power5p_marked_instr_event()
437 	byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;  in power5p_marked_instr_event()
440 		/* byte 1 bits 0-7, byte 2 bits 0,2-4,6 */  in power5p_marked_instr_event()
442 	} else if (unit == PM_LSU1 && byte >= 4) {  in power5p_marked_instr_event()
443 		byte -= 4;  in power5p_marked_instr_event()
444 		/* byte 5 bits 6-7, byte 6 bits 0,4, byte 7 bits 0-4,6 */  in power5p_marked_instr_event()
449 	return (mask >> (byte * 8 + bit)) & 1;  in power5p_marked_instr_event()
459 	unsigned int pmc, unit, byte, psel;  in power5p_compute_mmcr()  local
468 		return -1;  in power5p_compute_mmcr()
477 				return -1;  in power5p_compute_mmcr()
478 			if (pmc_inuse & (1 << (pmc - 1)))  in power5p_compute_mmcr()
479 				return -1;  in power5p_compute_mmcr()
480 			pmc_inuse |= 1 << (pmc - 1);  in power5p_compute_mmcr()
484 			byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;  in power5p_compute_mmcr()
486 				return -1;  in power5p_compute_mmcr()
489 			if (byte >= 4) {  in power5p_compute_mmcr()
491 					return -1;  in power5p_compute_mmcr()
493 				byte &= 3;  in power5p_compute_mmcr()
495 			if (busbyte[byte] && busbyte[byte] != unit)  in power5p_compute_mmcr()
496 				return -1;  in power5p_compute_mmcr()
497 			busbyte[byte] = unit;  in power5p_compute_mmcr()
519 			return -1;  in power5p_compute_mmcr()
527 			return -1;  in power5p_compute_mmcr()
528 		mmcr1 |= (unsigned long)(i & 3) << MMCR1_TTM1SEL_SH;  in power5p_compute_mmcr()
531 		return -1;  in power5p_compute_mmcr()
533 	/* Set byte lane select fields, TTM[23]SEL and GRS_*SEL. */  in power5p_compute_mmcr()
534 	for (byte = 0; byte < 4; ++byte) {  in power5p_compute_mmcr()
535 		unit = busbyte[byte];  in power5p_compute_mmcr()
542 			/* select lower word of LSU1 for this byte */  in power5p_compute_mmcr()
543 			mmcr1 |= 1ul << (MMCR1_TTM3SEL_SH + 3 - byte);  in power5p_compute_mmcr()
547 			<< (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte);  in power5p_compute_mmcr()
554 		byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;  in power5p_compute_mmcr()
558 			/* Bus event or any-PMC direct event */  in power5p_compute_mmcr()
564 				return -1;  in power5p_compute_mmcr()
568 			--pmc;  in power5p_compute_mmcr()
569 			if (isbus && (byte & 2) &&  in power5p_compute_mmcr()
571 				/* add events on higher-numbered bus */  in power5p_compute_mmcr()
572 				mmcr1 |= 1ul << (MMCR1_PMC1_ADDER_SEL_SH - pmc);  in power5p_compute_mmcr()
575 			--pmc;  in power5p_compute_mmcr()
584 		if ((psel & 0x58) == 0x40 && (byte & 1) != ((pmc >> 1) & 1))  in power5p_compute_mmcr()
585 			/* select alternate byte lane */  in power5p_compute_mmcr()
587 		if (pmc <= 3)  in power5p_compute_mmcr()
593 	mmcr->mmcr0 = 0;  in power5p_compute_mmcr()
595 		mmcr->mmcr0 = MMCR0_PMC1CE;  in power5p_compute_mmcr()
597 		mmcr->mmcr0 |= MMCR0_PMCjCE;  in power5p_compute_mmcr()
598 	mmcr->mmcr1 = mmcr1;  in power5p_compute_mmcr()
599 	mmcr->mmcra = mmcra;  in power5p_compute_mmcr()
605 	if (pmc <= 3)  in power5p_disable_pmc()
606 		mmcr->mmcr1 &= ~(0x7fUL << MMCR1_PMCSEL_SH(pmc));  in power5p_disable_pmc()
621  * Table of generalized cache-related events.
622  * 0 means not supported, -1 means nonsensical, other values
629 		[C(OP_PREFETCH)] = {	0xc70e7,	-1		},
633 		[C(OP_WRITE)] = {	-1,		-1		},
643 		[C(OP_WRITE)] = {	-1,		-1		},
644 		[C(OP_PREFETCH)] = {	-1,		-1		},
648 		[C(OP_WRITE)] = {	-1,		-1		},
649 		[C(OP_PREFETCH)] = {	-1,		-1		},
653 		[C(OP_WRITE)] = {	-1,		-1		},
654 		[C(OP_PREFETCH)] = {	-1,		-1		},
657 		[C(OP_READ)] = {	-1,		-1		},
658 		[C(OP_WRITE)] = {	-1,		-1		},
659 		[C(OP_PREFETCH)] = {	-1,		-1		},
685 		return -ENODEV;  in init_power5p_pmu()