Lines Matching +full:use +full:- +full:guard +full:- +full:pages
1 /* SPDX-License-Identifier: GPL-2.0 */
8 * We also use the two level tables, but we can put the real bits in them
14 * accessed, and overload the changed bit for write protect. We use
19 * register when the TLB entry is loaded. We will use bit 27 for guard, since
25 * load the PMD into MD_TWC. The 8M pages are only used for kernel
85 #include <asm/pgtable-masks.h>
139 pte_update(vma->vm_mm, address, ptep, clr, set, huge); in __ptep_set_access_flags()
168 * On the 8xx, the page tables are a bit special. For 16k pages, we have
169 * 4 identical entries. For 512k pages, we have 128 entries as if it was
170 * 4k pages, but they are flagged as 512k pages for the hardware.
217 pte_basic_t val = READ_ONCE(ptep->pte); in ptep_get()