powerpc/crypto/chacha-p10le-8x.S

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
17 # 4.  c += d; b ^= c; b <<<= 7
22 # row3 = (row3 + row4), row2 = row3 xor row2,  row2 rotate each word by 7
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
81 	stdu 1,-752(1)
199 	vadduwm 1, 1, 5
201 	vadduwm 3, 3, 7
225 	vxor 5, 5, 9
227 	vxor 7, 7, 11
236 	vrlw 5, 5, 25
238 	vrlw 7, 7, 25
245 	vadduwm 1, 1, 5
247 	vadduwm 3, 3, 7
275 	vxor 5, 5, 9
277 	vxor 7, 7, 11
283 	vrlw 5, 5, 28
285 	vrlw 7, 7, 28
295 	vadduwm 0, 0, 5
297 	vadduwm 2, 2, 7
322 	vxor 5, 5, 10
324 	vxor 7, 7, 8
333 	vrlw 5, 5, 25
335 	vrlw 7, 7, 25
343 	vadduwm 0, 0, 5
345 	vadduwm 2, 2, 7
375 	vxor 5, 5, 10
377 	vxor 7, 7, 8
383 	vrlw 5, 5, 28
385 	vrlw 7, 7, 28
397 	vadduwm 1, 1, 5
399 	vadduwm 3, 3, 7
409 	vxor 5, 5, 9
411 	vxor 7, 7, 11
413 	vrlw 5, 5, 21
415 	vrlw 7, 7, 21
417 	vadduwm 1, 1, 5
419 	vadduwm 3, 3, 7
429 	vxor 5, 5, 9
431 	vxor 7, 7, 11
433 	vrlw 5, 5, 23
435 	vrlw 7, 7, 23
438 	vadduwm 0, 0, 5
440 	vadduwm 2, 2, 7
450 	vxor 5, 5, 10
452 	vxor 7, 7, 8
454 	vrlw 5, 5, 21
456 	vrlw 7, 7, 21
458 	vadduwm 0, 0, 5
460 	vadduwm 2, 2, 7
470 	vxor 5, 5, 10
472 	vxor 7, 7, 8
474 	vrlw 5, 5, 23
476 	vrlw 7, 7, 23
494 	vadduwm \S+0, \S+0, 16-\S
495 	vadduwm \S+4, \S+4, 17-\S
496 	vadduwm \S+8, \S+8, 18-\S
497 	vadduwm \S+12, \S+12, 19-\S
499 	vadduwm \S+1, \S+1, 16-\S
500 	vadduwm \S+5, \S+5, 17-\S
501 	vadduwm \S+9, \S+9, 18-\S
502 	vadduwm \S+13, \S+13, 19-\S
504 	vadduwm \S+2, \S+2, 16-\S
505 	vadduwm \S+6, \S+6, 17-\S
506 	vadduwm \S+10, \S+10, 18-\S
507 	vadduwm \S+14, \S+14, 19-\S
509 	vadduwm	\S+3, \S+3, 16-\S
510 	vadduwm	\S+7, \S+7, 17-\S
511 	vadduwm	\S+11, \S+11, 18-\S
512 	vadduwm	\S+15, \S+15, 19-\S
519 	add 9, 14, 5
526 	lxvw4x 5, 21, 9
528 	lxvw4x 7, 23, 9
543 	xxlxor \S+37, \S+37, 5
545 	xxlxor \S+45, \S+45, 7
581 .align 5
587 	# r17 - r31 mainly for Write_256 macro.
618 	vmrglw	5, 2, 3
619 	vsldoi	30, 4, 5, 8		# vr30 counter, 4 (0, 1, 2, 3)
622 	vspltisw 23, 7
629 	sradi	8, 7, 1
664 	xxspltw  32+5, 17, 1
666 	xxspltw  32+7, 17, 3
696 .align 5
707 	TP_4x 4, 5, 6, 7
726 	addi	15, 15, -256	# len -=256
728 	xxlor	5, 32+31, 32+31
731 	xxlor	32+31, 5, 5
733 	TP_4x 16+4, 16+5, 16+6, 16+7
744 	addi	15, 15, -256	# len +=256
770 	vspltisw 23, 7
776 	sradi	8, 7, 1
786 	vspltw  5, 17, 1
788 	vspltw  7, 17, 3
799 .align 5
807 	TP_4x 4, 5, 6, 7
814 	addi	15, 15, -256	# len += 256
838 .align 5