Lines Matching +full:sw +full:- +full:exception
1 // SPDX-License-Identifier: GPL-2.0
54 #include "../math-emu/math-emu.h" /* for handle_fpe() */
61 unsigned long mask = 1UL << (nbits - 1); in printbinary()
76 #define FFMT "%016llx" /* fpregs are 64-bit always */
79 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
90 printbinary(buf, regs->gr[0], 32); in print_gr()
94 PRINTREGS(level, regs->gr, "r", RFMT, i); in print_gr()
101 struct { u32 sw[2]; } s; in print_fr() member
106 * The fldd is used to restore the T-bit if there was one, as the in print_fr()
108 * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */ in print_fr()
115 printbinary(buf, s.sw[0], 32); in print_fr()
117 printk("%sFPER1: %08x\n", level, s.sw[1]); in print_fr()
121 PRINTREGS(level, regs->fr, "fr", FFMT, i); in print_fr()
138 PRINTREGS(level, regs->sr, "sr", RFMT, i); in show_regs()
147 level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]); in show_regs()
149 level, regs->iir, regs->isr, regs->ior); in show_regs()
152 printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28); in show_regs()
155 printk("%s IAOQ[0]: " RFMT "\n", level, regs->iaoq[0]); in show_regs()
156 printk("%s IAOQ[1]: " RFMT "\n", level, regs->iaoq[1]); in show_regs()
157 printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]); in show_regs()
159 printk("%s IAOQ[0]: %pS\n", level, (void *) regs->iaoq[0]); in show_regs()
160 printk("%s IAOQ[1]: %pS\n", level, (void *) regs->iaoq[1]); in show_regs()
161 printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]); in show_regs()
184 if (unwind_once(info) < 0 || info->ip == 0) in do_show_stack()
187 if (__kernel_text_address(info->ip)) { in do_show_stack()
189 loglvl, info->ip, (void *) info->ip); in do_show_stack()
224 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]); in die_if_kernel()
237 " ------------------------------- \n" in die_if_kernel()
240 " U ||----w |\n" in die_if_kernel()
248 current->comm, task_pid_nr(current), str, err); in die_if_kernel()
251 if (current->thread.flags & PARISC_KERNEL_DEATH) { in die_if_kernel()
256 current->thread.flags |= PARISC_KERNEL_DEATH; in die_if_kernel()
263 panic("Fatal exception in interrupt"); in die_if_kernel()
266 panic("Fatal exception"); in die_if_kernel()
277 (void __user *) (regs->iaoq[0] & ~3)); in handle_gdb_break()
282 unsigned iir = regs->iir; in handle_break()
287 tt = report_bug(regs->iaoq[0] & ~3, regs); in handle_break()
289 regs->iaoq[0] += 4; in handle_break()
290 regs->iaoq[1] += 4; in handle_break()
325 iir & 31, (iir>>13) & ((1<<13)-1), in handle_break()
326 task_pid_nr(current), current->comm); in handle_break()
356 regs->gr[0] = pim_wide->cr[22]; in transfer_pim_to_trap_frame()
359 regs->gr[i] = pim_wide->gr[i]; in transfer_pim_to_trap_frame()
362 regs->fr[i] = pim_wide->fr[i]; in transfer_pim_to_trap_frame()
365 regs->sr[i] = pim_wide->sr[i]; in transfer_pim_to_trap_frame()
367 regs->iasq[0] = pim_wide->cr[17]; in transfer_pim_to_trap_frame()
368 regs->iasq[1] = pim_wide->iasq_back; in transfer_pim_to_trap_frame()
369 regs->iaoq[0] = pim_wide->cr[18]; in transfer_pim_to_trap_frame()
370 regs->iaoq[1] = pim_wide->iaoq_back; in transfer_pim_to_trap_frame()
372 regs->sar = pim_wide->cr[11]; in transfer_pim_to_trap_frame()
373 regs->iir = pim_wide->cr[19]; in transfer_pim_to_trap_frame()
374 regs->isr = pim_wide->cr[20]; in transfer_pim_to_trap_frame()
375 regs->ior = pim_wide->cr[21]; in transfer_pim_to_trap_frame()
380 regs->gr[0] = pim_narrow->cr[22]; in transfer_pim_to_trap_frame()
383 regs->gr[i] = pim_narrow->gr[i]; in transfer_pim_to_trap_frame()
386 regs->fr[i] = pim_narrow->fr[i]; in transfer_pim_to_trap_frame()
389 regs->sr[i] = pim_narrow->sr[i]; in transfer_pim_to_trap_frame()
391 regs->iasq[0] = pim_narrow->cr[17]; in transfer_pim_to_trap_frame()
392 regs->iasq[1] = pim_narrow->iasq_back; in transfer_pim_to_trap_frame()
393 regs->iaoq[0] = pim_narrow->cr[18]; in transfer_pim_to_trap_frame()
394 regs->iaoq[1] = pim_narrow->iaoq_back; in transfer_pim_to_trap_frame()
396 regs->sar = pim_narrow->cr[11]; in transfer_pim_to_trap_frame()
397 regs->iir = pim_narrow->cr[19]; in transfer_pim_to_trap_frame()
398 regs->isr = pim_narrow->cr[20]; in transfer_pim_to_trap_frame()
399 regs->ior = pim_narrow->cr[21]; in transfer_pim_to_trap_frame()
407 regs->ksp = 0; in transfer_pim_to_trap_frame()
408 regs->kpc = 0; in transfer_pim_to_trap_frame()
409 regs->orig_r28 = 0; in transfer_pim_to_trap_frame()
445 /* show_stack(NULL, (unsigned long *)regs->gr[30]); */ in parisc_terminate()
481 if (!irqs_disabled_flags(regs->gr[0])) in handle_interruption()
504 if (((unsigned long)regs->iaoq[0] & 3) && in handle_interruption()
505 ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) { in handle_interruption()
507 regs->iaoq[0] = 0 | 3; in handle_interruption()
508 regs->iaoq[1] = regs->iaoq[0] + 4; in handle_interruption()
509 regs->iasq[0] = regs->iasq[1] = regs->sr[7]; in handle_interruption()
510 regs->gr[0] &= ~PSW_B; in handle_interruption()
521 /* High-priority machine check (HPMC) */ in handle_interruption()
537 regs->gr[0] &= ~PSW_R; in handle_interruption()
548 /* else this must be the start of a syscall - just let it run */ in handle_interruption()
552 /* Low-priority machine check */ in handle_interruption()
562 fault_address = regs->iaoq[0]; in handle_interruption()
563 fault_space = regs->iasq[0]; in handle_interruption()
585 if ((regs->iir & 0xffdfffe0) == 0x034008a0) { in handle_interruption()
591 if (regs->iir & 0x00200000) in handle_interruption()
592 regs->gr[regs->iir & 0x1f] = mfctl(27); in handle_interruption()
594 regs->gr[regs->iir & 0x1f] = mfctl(26); in handle_interruption()
596 regs->iaoq[0] = regs->iaoq[1]; in handle_interruption()
597 regs->iaoq[1] += 4; in handle_interruption()
598 regs->iasq[0] = regs->iasq[1]; in handle_interruption()
606 (void __user *) regs->iaoq[0]); in handle_interruption()
612 (void __user *) regs->iaoq[0]); in handle_interruption()
624 (void __user *) regs->iaoq[0]); in handle_interruption()
631 /* Assist Exception Trap, i.e. floating point exception. */ in handle_interruption()
632 die_if_kernel("Floating point exception", regs, 0); /* quiet */ in handle_interruption()
641 /* Non-access instruction TLB miss fault */ in handle_interruption()
646 /* Non-access data TLB miss fault/Non-access data page fault */ in handle_interruption()
649 If the insn used a non-shadow register, then the tlb in handle_interruption()
650 handlers could not have their side-effect (e.g. probe in handle_interruption()
659 fault_address = regs->ior; in handle_interruption()
660 fault_space = regs->isr; in handle_interruption()
664 /* PCXS only -- later cpu's split this into types 26,27 & 28 */ in handle_interruption()
673 fault_address = regs->ior; in handle_interruption()
674 fault_space = regs->isr; in handle_interruption()
679 regs->gr[0] |= PSW_X; /* So we can single-step over the trap */ in handle_interruption()
688 regs->gr[0] &= ~PSW_T; in handle_interruption()
691 /* else this must be the start of a syscall - just let it in handle_interruption()
714 mmap_read_lock(current->mm); in handle_interruption()
715 vma = find_vma(current->mm,regs->iaoq[0]); in handle_interruption()
716 if (vma && (regs->iaoq[0] >= vma->vm_start) in handle_interruption()
717 && (vma->vm_flags & VM_EXEC)) { in handle_interruption()
719 fault_address = regs->iaoq[0]; in handle_interruption()
720 fault_space = regs->iasq[0]; in handle_interruption()
722 mmap_read_unlock(current->mm); in handle_interruption()
725 mmap_read_unlock(current->mm); in handle_interruption()
728 regs->iir = 0xbaadf00d; in handle_interruption()
739 ((void __user *) regs->iaoq[0]) : in handle_interruption()
740 ((void __user *) regs->ior)); in handle_interruption()
752 task_pid_nr(current), current->comm); in handle_interruption()
755 (void __user *)regs->ior); in handle_interruption()
765 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) { in handle_interruption()
769 task_pid_nr(current), current->comm); in handle_interruption()
771 (void __user *)regs->ior); in handle_interruption()
784 /* Clean up and return if in exception table. */ in handle_interruption()
789 parisc_acctyp(code, regs->iir) == VM_WRITE, regs)) in handle_interruption()
819 * PDCE_CHECK in HPMC handler. See programming note at page 1-31 of in initialize_ivt()
831 * Address (IVA + 56) are word-aligned. in initialize_ivt()
842 ivap[5] = -check; in initialize_ivt()
848 * write-protect the kernel */