Lines Matching +full:rpc +full:- +full:if
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
22 #include <asm/mach-ralink/rt3883.h>
23 #include <asm/mach-ralink/ralink_regs.h>
77 hose = (struct pci_controller *) bus->sysdata; in pci_bus_to_rt3883_controller()
81 static inline u32 rt3883_pci_r32(struct rt3883_pci_controller *rpc, in rt3883_pci_r32() argument
84 return ioread32(rpc->base + reg); in rt3883_pci_r32()
87 static inline void rt3883_pci_w32(struct rt3883_pci_controller *rpc, in rt3883_pci_w32() argument
90 iowrite32(val, rpc->base + reg); in rt3883_pci_w32()
100 static u32 rt3883_pci_read_cfg32(struct rt3883_pci_controller *rpc, in rt3883_pci_read_cfg32() argument
108 rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR); in rt3883_pci_read_cfg32()
110 return rt3883_pci_r32(rpc, RT3883_PCI_REG_CFGDATA); in rt3883_pci_read_cfg32()
113 static void rt3883_pci_write_cfg32(struct rt3883_pci_controller *rpc, in rt3883_pci_write_cfg32() argument
121 rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR); in rt3883_pci_write_cfg32()
122 rt3883_pci_w32(rpc, val, RT3883_PCI_REG_CFGDATA); in rt3883_pci_write_cfg32()
127 struct rt3883_pci_controller *rpc; in rt3883_pci_irq_handler() local
130 rpc = irq_desc_get_handler_data(desc); in rt3883_pci_irq_handler()
132 pending = rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIINT) & in rt3883_pci_irq_handler()
133 rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_handler()
135 if (!pending) { in rt3883_pci_irq_handler()
143 generic_handle_domain_irq(rpc->irq_domain, bit); in rt3883_pci_irq_handler()
151 struct rt3883_pci_controller *rpc; in rt3883_pci_irq_unmask() local
154 rpc = irq_data_get_irq_chip_data(d); in rt3883_pci_irq_unmask()
156 t = rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_unmask()
157 rt3883_pci_w32(rpc, t | BIT(d->hwirq), RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_unmask()
159 rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_unmask()
164 struct rt3883_pci_controller *rpc; in rt3883_pci_irq_mask() local
167 rpc = irq_data_get_irq_chip_data(d); in rt3883_pci_irq_mask()
169 t = rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_mask()
170 rt3883_pci_w32(rpc, t & ~BIT(d->hwirq), RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_mask()
172 rt3883_pci_r32(rpc, RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_mask()
186 irq_set_chip_data(irq, d->host_data); in rt3883_pci_irq_map()
197 struct rt3883_pci_controller *rpc) in rt3883_pci_irq_init() argument
201 irq = irq_of_parse_and_map(rpc->intc_of_node, 0); in rt3883_pci_irq_init()
202 if (irq == 0) { in rt3883_pci_irq_init()
203 dev_err(dev, "%pOF has no IRQ", rpc->intc_of_node); in rt3883_pci_irq_init()
204 return -EINVAL; in rt3883_pci_irq_init()
208 rt3883_pci_w32(rpc, 0, RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_init()
210 rpc->irq_domain = in rt3883_pci_irq_init()
211 irq_domain_add_linear(rpc->intc_of_node, RT3883_PCI_IRQ_COUNT, in rt3883_pci_irq_init()
213 rpc); in rt3883_pci_irq_init()
214 if (!rpc->irq_domain) { in rt3883_pci_irq_init()
216 return -ENODEV; in rt3883_pci_irq_init()
219 irq_set_chained_handler_and_data(irq, rt3883_pci_irq_handler, rpc); in rt3883_pci_irq_init()
227 struct rt3883_pci_controller *rpc; in rt3883_pci_config_read() local
231 rpc = pci_bus_to_rt3883_controller(bus); in rt3883_pci_config_read()
233 if (!rpc->pcie_ready && bus->number == 1) in rt3883_pci_config_read()
236 address = rt3883_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn), in rt3883_pci_config_read()
239 rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR); in rt3883_pci_config_read()
240 data = rt3883_pci_r32(rpc, RT3883_PCI_REG_CFGDATA); in rt3883_pci_config_read()
260 struct rt3883_pci_controller *rpc; in rt3883_pci_config_write() local
264 rpc = pci_bus_to_rt3883_controller(bus); in rt3883_pci_config_write()
266 if (!rpc->pcie_ready && bus->number == 1) in rt3883_pci_config_write()
269 address = rt3883_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn), in rt3883_pci_config_write()
272 rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR); in rt3883_pci_config_write()
273 data = rt3883_pci_r32(rpc, RT3883_PCI_REG_CFGDATA); in rt3883_pci_config_write()
289 rt3883_pci_w32(rpc, data, RT3883_PCI_REG_CFGDATA); in rt3883_pci_config_write()
299 static void rt3883_pci_preinit(struct rt3883_pci_controller *rpc, unsigned mode) in rt3883_pci_preinit() argument
310 if (mode & RT3883_PCI_MODE_PCIE) { in rt3883_pci_preinit()
345 if (mode & RT3883_PCI_MODE_PCI) { in rt3883_pci_preinit()
350 if (mode & RT3883_PCI_MODE_PCIE) { in rt3883_pci_preinit()
363 * and de-assert the reset line in rt3883_pci_preinit()
366 rt3883_pci_w32(rpc, t, RT3883_PCI_REG_PCICFG); in rt3883_pci_preinit()
369 rt3883_pci_r32(rpc, RT3883_PCI_REG_PCICFG); in rt3883_pci_preinit()
372 if (mode & RT3883_PCI_MODE_PCIE) { in rt3883_pci_preinit()
375 t = rt3883_pci_r32(rpc, RT3883_PCI_REG_STATUS(1)); in rt3883_pci_preinit()
377 rpc->pcie_ready = t & BIT(0); in rt3883_pci_preinit()
379 if (!rpc->pcie_ready) { in rt3883_pci_preinit()
399 rt3883_pci_w32(rpc, 0x79, RT3883_PCI_REG_ARBCTL); in rt3883_pci_preinit()
404 struct rt3883_pci_controller *rpc; in rt3883_pci_probe() local
405 struct device *dev = &pdev->dev; in rt3883_pci_probe()
406 struct device_node *np = dev->of_node; in rt3883_pci_probe()
412 rpc = devm_kzalloc(dev, sizeof(*rpc), GFP_KERNEL); in rt3883_pci_probe()
413 if (!rpc) in rt3883_pci_probe()
414 return -ENOMEM; in rt3883_pci_probe()
416 rpc->base = devm_platform_ioremap_resource(pdev, 0); in rt3883_pci_probe()
417 if (IS_ERR(rpc->base)) in rt3883_pci_probe()
418 return PTR_ERR(rpc->base); in rt3883_pci_probe()
422 if (of_property_read_bool(child, "interrupt-controller")) { in rt3883_pci_probe()
423 rpc->intc_of_node = child; in rt3883_pci_probe()
428 if (!rpc->intc_of_node) { in rt3883_pci_probe()
431 return -EINVAL; in rt3883_pci_probe()
436 if (of_node_is_type(child, "pci")) { in rt3883_pci_probe()
437 rpc->pci_controller.of_node = child; in rt3883_pci_probe()
442 if (!rpc->pci_controller.of_node) { in rt3883_pci_probe()
445 err = -EINVAL; in rt3883_pci_probe()
450 for_each_available_child_of_node(rpc->pci_controller.of_node, child) { in rt3883_pci_probe()
453 if (!of_node_is_type(child, "pci")) in rt3883_pci_probe()
457 if (devfn < 0) in rt3883_pci_probe()
472 if (mode == RT3883_PCI_MODE_NONE) { in rt3883_pci_probe()
474 err = -EINVAL; in rt3883_pci_probe()
482 rt3883_pci_preinit(rpc, mode); in rt3883_pci_probe()
484 rpc->pci_controller.pci_ops = &rt3883_pci_ops; in rt3883_pci_probe()
485 rpc->pci_controller.io_resource = &rpc->io_res; in rt3883_pci_probe()
486 rpc->pci_controller.mem_resource = &rpc->mem_res; in rt3883_pci_probe()
489 pci_load_of_ranges(&rpc->pci_controller, in rt3883_pci_probe()
490 rpc->pci_controller.of_node); in rt3883_pci_probe()
492 rt3883_pci_w32(rpc, rpc->mem_res.start, RT3883_PCI_REG_MEMBASE); in rt3883_pci_probe()
493 rt3883_pci_w32(rpc, rpc->io_res.start, RT3883_PCI_REG_IOBASE); in rt3883_pci_probe()
495 ioport_resource.start = rpc->io_res.start; in rt3883_pci_probe()
496 ioport_resource.end = rpc->io_res.end; in rt3883_pci_probe()
499 rt3883_pci_w32(rpc, 0x03ff0000, RT3883_PCI_REG_BAR0SETUP(0)); in rt3883_pci_probe()
500 rt3883_pci_w32(rpc, RT3883_MEMORY_BASE, RT3883_PCI_REG_IMBASEBAR0(0)); in rt3883_pci_probe()
501 rt3883_pci_w32(rpc, 0x08021814, RT3883_PCI_REG_ID(0)); in rt3883_pci_probe()
502 rt3883_pci_w32(rpc, 0x00800001, RT3883_PCI_REG_CLASS(0)); in rt3883_pci_probe()
503 rt3883_pci_w32(rpc, 0x28801814, RT3883_PCI_REG_SUBID(0)); in rt3883_pci_probe()
506 rt3883_pci_w32(rpc, 0x03ff0000, RT3883_PCI_REG_BAR0SETUP(1)); in rt3883_pci_probe()
507 rt3883_pci_w32(rpc, RT3883_MEMORY_BASE, RT3883_PCI_REG_IMBASEBAR0(1)); in rt3883_pci_probe()
508 rt3883_pci_w32(rpc, 0x08021814, RT3883_PCI_REG_ID(1)); in rt3883_pci_probe()
509 rt3883_pci_w32(rpc, 0x06040001, RT3883_PCI_REG_CLASS(1)); in rt3883_pci_probe()
510 rt3883_pci_w32(rpc, 0x28801814, RT3883_PCI_REG_SUBID(1)); in rt3883_pci_probe()
512 err = rt3883_pci_irq_init(dev, rpc); in rt3883_pci_probe()
513 if (err) in rt3883_pci_probe()
517 val = rt3883_pci_read_cfg32(rpc, 0, 0x01, 0, PCI_COMMAND); in rt3883_pci_probe()
519 rt3883_pci_write_cfg32(rpc, 0, 0x01, 0, PCI_COMMAND, val); in rt3883_pci_probe()
522 val = rt3883_pci_read_cfg32(rpc, 0, 0x00, 0, PCI_COMMAND); in rt3883_pci_probe()
524 rt3883_pci_write_cfg32(rpc, 0, 0x00, 0, PCI_COMMAND, val); in rt3883_pci_probe()
526 if (mode == RT3883_PCI_MODE_PCIE) { in rt3883_pci_probe()
527 rt3883_pci_w32(rpc, 0x03ff0001, RT3883_PCI_REG_BAR0SETUP(0)); in rt3883_pci_probe()
528 rt3883_pci_w32(rpc, 0x03ff0001, RT3883_PCI_REG_BAR0SETUP(1)); in rt3883_pci_probe()
530 rt3883_pci_write_cfg32(rpc, 0, RT3883_P2P_BR_DEVNUM, 0, in rt3883_pci_probe()
534 rt3883_pci_read_cfg32(rpc, 0, RT3883_P2P_BR_DEVNUM, 0, in rt3883_pci_probe()
537 rt3883_pci_write_cfg32(rpc, 0, RT3883_P2P_BR_DEVNUM, 0, in rt3883_pci_probe()
541 register_pci_controller(&rpc->pci_controller); in rt3883_pci_probe()
546 of_node_put(rpc->pci_controller.of_node); in rt3883_pci_probe()
548 of_node_put(rpc->intc_of_node); in rt3883_pci_probe()
563 { .compatible = "ralink,rt3883-pci" },
570 .name = "rt3883-pci",