Lines Matching +full:ctrl +full:- +full:len
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
5 #define pr_fmt(fmt) "hw-breakpoint: " fmt
73 GEN_READ_WB_REG_CASES(CSR_CFG_CTRL, CTRL, t, val); in read_wb_reg()
88 GEN_WRITE_WB_REG_CASES(CSR_CFG_CTRL, CTRL, t, val); in write_wb_reg()
102 * hw_breakpoint_slot_setup - Find and setup a perf slot according to operations
111 * -ENOSPC if no slot is available/matches
112 * -EINVAL on wrong operations parameter
138 return -EINVAL; in hw_breakpoint_slot_setup()
142 return -ENOSPC; in hw_breakpoint_slot_setup()
147 memset(tsk->thread.hbp_break, 0, sizeof(tsk->thread.hbp_break)); in ptrace_hw_copy_thread()
148 memset(tsk->thread.hbp_watch, 0, sizeof(tsk->thread.hbp_watch)); in ptrace_hw_copy_thread()
157 struct thread_struct *t = &tsk->thread; in flush_ptrace_hw_breakpoint()
160 if (t->hbp_break[i]) { in flush_ptrace_hw_breakpoint()
161 unregister_hw_breakpoint(t->hbp_break[i]); in flush_ptrace_hw_breakpoint()
162 t->hbp_break[i] = NULL; in flush_ptrace_hw_breakpoint()
167 if (t->hbp_watch[i]) { in flush_ptrace_hw_breakpoint()
168 unregister_hw_breakpoint(t->hbp_watch[i]); in flush_ptrace_hw_breakpoint()
169 t->hbp_watch[i] = NULL; in flush_ptrace_hw_breakpoint()
177 u32 ctrl; in hw_breakpoint_control() local
182 if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { in hw_breakpoint_control()
200 write_wb_reg(CSR_CFG_ADDR, i, 0, info->address); in hw_breakpoint_control()
201 write_wb_reg(CSR_CFG_ADDR, i, 1, info->address); in hw_breakpoint_control()
202 write_wb_reg(CSR_CFG_MASK, i, 0, info->mask); in hw_breakpoint_control()
203 write_wb_reg(CSR_CFG_MASK, i, 1, info->mask); in hw_breakpoint_control()
206 if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) { in hw_breakpoint_control()
209 ctrl = encode_ctrl_reg(info->ctrl); in hw_breakpoint_control()
210 write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl | CTRL_PLV_ENABLE); in hw_breakpoint_control()
271 unsigned int len; in arch_check_bp_in_kernelspace() local
274 va = hw->address; in arch_check_bp_in_kernelspace()
275 len = get_hbp_len(hw->ctrl.len); in arch_check_bp_in_kernelspace()
277 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE); in arch_check_bp_in_kernelspace()
285 int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, in arch_bp_generic_fields() argument
289 switch (ctrl.type) { in arch_bp_generic_fields()
303 return -EINVAL; in arch_bp_generic_fields()
306 if (!ctrl.len) in arch_bp_generic_fields()
307 return -EINVAL; in arch_bp_generic_fields()
309 *offset = __ffs(ctrl.len); in arch_bp_generic_fields()
311 /* Len */ in arch_bp_generic_fields()
312 switch (ctrl.len) { in arch_bp_generic_fields()
326 return -EINVAL; in arch_bp_generic_fields()
340 switch (attr->bp_type) { in arch_build_bp_info()
342 hw->ctrl.type = LOONGARCH_BREAKPOINT_EXECUTE; in arch_build_bp_info()
345 hw->ctrl.type = LOONGARCH_BREAKPOINT_LOAD; in arch_build_bp_info()
348 hw->ctrl.type = LOONGARCH_BREAKPOINT_STORE; in arch_build_bp_info()
351 hw->ctrl.type = LOONGARCH_BREAKPOINT_LOAD | LOONGARCH_BREAKPOINT_STORE; in arch_build_bp_info()
354 return -EINVAL; in arch_build_bp_info()
357 /* Len */ in arch_build_bp_info()
358 switch (attr->bp_len) { in arch_build_bp_info()
360 hw->ctrl.len = LOONGARCH_BREAKPOINT_LEN_1; in arch_build_bp_info()
363 hw->ctrl.len = LOONGARCH_BREAKPOINT_LEN_2; in arch_build_bp_info()
366 hw->ctrl.len = LOONGARCH_BREAKPOINT_LEN_4; in arch_build_bp_info()
369 hw->ctrl.len = LOONGARCH_BREAKPOINT_LEN_8; in arch_build_bp_info()
372 return -EINVAL; in arch_build_bp_info()
376 hw->address = attr->bp_addr; in arch_build_bp_info()
382 * Validate the arch-specific HW Breakpoint register settings.
396 if (hw->ctrl.type != LOONGARCH_BREAKPOINT_EXECUTE) in hw_breakpoint_arch_parse()
400 offset = hw->address & alignment_mask; in hw_breakpoint_arch_parse()
402 hw->address &= ~alignment_mask; in hw_breakpoint_arch_parse()
403 hw->ctrl.len <<= offset; in hw_breakpoint_arch_parse()
410 u32 ctrl; in update_bp_registers() local
434 if ((info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) && (type == 0)) { in update_bp_registers()
438 ctrl = read_wb_reg(CSR_CFG_CTRL, i, 1); in update_bp_registers()
439 if (info->ctrl.type == LOONGARCH_BREAKPOINT_LOAD) in update_bp_registers()
440 ctrl |= 0x1 << MWPnCFG3_LoadEn; in update_bp_registers()
441 if (info->ctrl.type == LOONGARCH_BREAKPOINT_STORE) in update_bp_registers()
442 ctrl |= 0x1 << MWPnCFG3_StoreEn; in update_bp_registers()
443 write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl); in update_bp_registers()
445 regs->csr_prmd |= CSR_PRMD_PWE; in update_bp_registers()
447 if ((info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) && (type == 0)) { in update_bp_registers()
450 ctrl = read_wb_reg(CSR_CFG_CTRL, i, 1); in update_bp_registers()
451 if (info->ctrl.type == LOONGARCH_BREAKPOINT_LOAD) in update_bp_registers()
452 ctrl &= ~0x1 << MWPnCFG3_LoadEn; in update_bp_registers()
453 if (info->ctrl.type == LOONGARCH_BREAKPOINT_STORE) in update_bp_registers()
454 ctrl &= ~0x1 << MWPnCFG3_StoreEn; in update_bp_registers()
455 write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl); in update_bp_registers()
457 regs->csr_prmd &= ~CSR_PRMD_PWE; in update_bp_registers()
527 if (!((regs->csr_era ^ addr) & ~mask)) in hw_breakpoint_thread_switch()
529 regs->csr_prmd |= CSR_PRMD_PWE; in hw_breakpoint_thread_switch()