Lines Matching full:7
26 * [7-5] : Op2
115 #define SB_BARRIER_INSN __SYS_BARRIER_INSN(0, 7, 31)
117 #define SYS_DC_ISW sys_insn(1, 0, 7, 6, 2)
118 #define SYS_DC_IGSW sys_insn(1, 0, 7, 6, 4)
119 #define SYS_DC_IGDSW sys_insn(1, 0, 7, 6, 6)
120 #define SYS_DC_CSW sys_insn(1, 0, 7, 10, 2)
121 #define SYS_DC_CGSW sys_insn(1, 0, 7, 10, 4)
122 #define SYS_DC_CGDSW sys_insn(1, 0, 7, 10, 6)
123 #define SYS_DC_CISW sys_insn(1, 0, 7, 14, 2)
124 #define SYS_DC_CIGSW sys_insn(1, 0, 7, 14, 4)
125 #define SYS_DC_CIGDSW sys_insn(1, 0, 7, 14, 6)
127 #define SYS_IC_IALLUIS sys_insn(1, 0, 7, 1, 0)
128 #define SYS_IC_IALLU sys_insn(1, 0, 7, 5, 0)
129 #define SYS_IC_IVAU sys_insn(1, 3, 7, 5, 1)
131 #define SYS_DC_IVAC sys_insn(1, 0, 7, 6, 1)
132 #define SYS_DC_IGVAC sys_insn(1, 0, 7, 6, 3)
133 #define SYS_DC_IGDVAC sys_insn(1, 0, 7, 6, 5)
135 #define SYS_DC_CVAC sys_insn(1, 3, 7, 10, 1)
136 #define SYS_DC_CGVAC sys_insn(1, 3, 7, 10, 3)
137 #define SYS_DC_CGDVAC sys_insn(1, 3, 7, 10, 5)
139 #define SYS_DC_CVAU sys_insn(1, 3, 7, 11, 1)
141 #define SYS_DC_CVAP sys_insn(1, 3, 7, 12, 1)
142 #define SYS_DC_CGVAP sys_insn(1, 3, 7, 12, 3)
143 #define SYS_DC_CGDVAP sys_insn(1, 3, 7, 12, 5)
145 #define SYS_DC_CVADP sys_insn(1, 3, 7, 13, 1)
146 #define SYS_DC_CGVADP sys_insn(1, 3, 7, 13, 3)
147 #define SYS_DC_CGDVADP sys_insn(1, 3, 7, 13, 5)
149 #define SYS_DC_CIVAC sys_insn(1, 3, 7, 14, 1)
150 #define SYS_DC_CIGVAC sys_insn(1, 3, 7, 14, 3)
151 #define SYS_DC_CIGDVAC sys_insn(1, 3, 7, 14, 5)
154 #define SYS_DC_ZVA sys_insn(1, 3, 7, 4, 1)
155 #define SYS_DC_GVA sys_insn(1, 3, 7, 4, 3)
156 #define SYS_DC_GZVA sys_insn(1, 3, 7, 4, 4)
177 #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
188 #define SYS_DBGCLAIMSET_EL1 sys_reg(2, 0, 7, 8, 6)
189 #define SYS_DBGCLAIMCLR_EL1 sys_reg(2, 0, 7, 9, 6)
190 #define SYS_DBGAUTHSTATUS_EL1 sys_reg(2, 0, 7, 14, 6)
195 #define SYS_DBGVCR32_EL2 sys_reg(2, 4, 0, 7, 0)
210 #define SYS_TRCACATR(m) sys_reg(2, 1, 2, ((m & 7) << 1), (2 | (m >> 3)))
211 #define SYS_TRCACVR(m) sys_reg(2, 1, 2, ((m & 7) << 1), (0 | (m >> 3)))
212 #define SYS_TRCAUTHSTATUS sys_reg(2, 1, 7, 14, 6)
218 #define SYS_TRCCIDCVR(m) sys_reg(2, 1, 3, ((m & 7) << 1), 0)
219 #define SYS_TRCCLAIMCLR sys_reg(2, 1, 7, 9, 6)
220 #define SYS_TRCCLAIMSET sys_reg(2, 1, 7, 8, 6)
225 #define SYS_TRCDEVARCH sys_reg(2, 1, 7, 15, 6)
226 #define SYS_TRCDEVID sys_reg(2, 1, 7, 2, 7)
230 #define SYS_TRCIDR0 sys_reg(2, 1, 0, 8, 7)
235 #define SYS_TRCIDR1 sys_reg(2, 1, 0, 9, 7)
236 #define SYS_TRCIDR2 sys_reg(2, 1, 0, 10, 7)
237 #define SYS_TRCIDR3 sys_reg(2, 1, 0, 11, 7)
238 #define SYS_TRCIDR4 sys_reg(2, 1, 0, 12, 7)
239 #define SYS_TRCIDR5 sys_reg(2, 1, 0, 13, 7)
240 #define SYS_TRCIDR6 sys_reg(2, 1, 0, 14, 7)
241 #define SYS_TRCIDR7 sys_reg(2, 1, 0, 15, 7)
244 #define SYS_TRCIMSPEC(m) sys_reg(2, 1, 0, (m & 7), 7)
253 #define SYS_TRCSEQSTR sys_reg(2, 1, 0, 7, 4)
254 #define SYS_TRCSSCCR(m) sys_reg(2, 1, 1, (m & 7), 2)
255 #define SYS_TRCSSCSR(m) sys_reg(2, 1, 1, (8 | (m & 7)), 2)
256 #define SYS_TRCSSPCICR(m) sys_reg(2, 1, 1, (m & 7), 3)
268 #define SYS_TRCVMIDCVR(m) sys_reg(2, 1, 3, ((m & 7) << 1), 1)
325 #define SYS_PAR_EL1 sys_reg(3, 0, 7, 4, 0)
382 #define SYS_ICC_SGI0R_EL1 sys_reg(3, 0, 12, 11, 7)
390 #define SYS_ICC_IGRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
396 #define SYS_AIDR_EL1 sys_reg(3, 1, 0, 0, 7)
408 #define SYS_PMCEID1_EL0 sys_reg(3, 3, 9, 12, 7)
419 #define SYS_SCXTNUM_EL0 sys_reg(3, 3, 13, 0, 7)
446 #define SYS_AMEVCNTR0_EL0(n) SYS_AM_EL0(4 + ((n) >> 3), (n) & 7)
447 #define SYS_AMEVTYPER0_EL0(n) SYS_AM_EL0(6 + ((n) >> 3), (n) & 7)
448 #define SYS_AMEVCNTR1_EL0(n) SYS_AM_EL0(12 + ((n) >> 3), (n) & 7)
449 #define SYS_AMEVTYPER1_EL0(n) SYS_AM_EL0(14 + ((n) >> 3), (n) & 7)
482 #define SYS_PMCCFILTR_EL0 sys_reg(3, 3, 14, 15, 7)
494 #define SYS_HACR_EL2 sys_reg(3, 4, 1, 1, 7)
536 #define SYS_MPAMVPM7_EL2 __SYS__MPAMVPMx_EL2(7)
561 #define SYS_ICH_VMCR_EL2 sys_reg(3, 4, 12, 11, 7)
571 #define SYS_ICH_LR7_EL2 __SYS__LR0_EL2(7)
581 #define SYS_ICH_LR15_EL2 __SYS__LR8_EL2(7)
585 #define SYS_SCXTNUM_EL2 sys_reg(3, 4, 13, 0, 7)
627 #define SYS_SCXTNUM_EL12 sys_reg(3, 5, 13, 0, 7)
640 #define AT_CRn 7
654 #define OP_AT_S12E0W sys_insn(AT_Op0, 4, AT_CRn, 8, 7)
662 #define OP_TLBI_VAALE1OS sys_insn(1, 0, 8, 1, 7)
666 #define OP_TLBI_RVAALE1IS sys_insn(1, 0, 8, 2, 7)
672 #define OP_TLBI_VAALE1IS sys_insn(1, 0, 8, 3, 7)
676 #define OP_TLBI_RVAALE1OS sys_insn(1, 0, 8, 5, 7)
680 #define OP_TLBI_RVAALE1 sys_insn(1, 0, 8, 6, 7)
681 #define OP_TLBI_VMALLE1 sys_insn(1, 0, 8, 7, 0)
682 #define OP_TLBI_VAE1 sys_insn(1, 0, 8, 7, 1)
683 #define OP_TLBI_ASIDE1 sys_insn(1, 0, 8, 7, 2)
684 #define OP_TLBI_VAAE1 sys_insn(1, 0, 8, 7, 3)
685 #define OP_TLBI_VALE1 sys_insn(1, 0, 8, 7, 5)
686 #define OP_TLBI_VAALE1 sys_insn(1, 0, 8, 7, 7)
692 #define OP_TLBI_VAALE1OSNXS sys_insn(1, 0, 9, 1, 7)
696 #define OP_TLBI_RVAALE1ISNXS sys_insn(1, 0, 9, 2, 7)
702 #define OP_TLBI_VAALE1ISNXS sys_insn(1, 0, 9, 3, 7)
706 #define OP_TLBI_RVAALE1OSNXS sys_insn(1, 0, 9, 5, 7)
710 #define OP_TLBI_RVAALE1NXS sys_insn(1, 0, 9, 6, 7)
711 #define OP_TLBI_VMALLE1NXS sys_insn(1, 0, 9, 7, 0)
712 #define OP_TLBI_VAE1NXS sys_insn(1, 0, 9, 7, 1)
713 #define OP_TLBI_ASIDE1NXS sys_insn(1, 0, 9, 7, 2)
714 #define OP_TLBI_VAAE1NXS sys_insn(1, 0, 9, 7, 3)
715 #define OP_TLBI_VALE1NXS sys_insn(1, 0, 9, 7, 5)
716 #define OP_TLBI_VAALE1NXS sys_insn(1, 0, 9, 7, 7)
740 #define OP_TLBI_RIPAS2LE1OS sys_insn(1, 4, 8, 4, 7)
745 #define OP_TLBI_ALLE2 sys_insn(1, 4, 8, 7, 0)
746 #define OP_TLBI_VAE2 sys_insn(1, 4, 8, 7, 1)
747 #define OP_TLBI_ALLE1 sys_insn(1, 4, 8, 7, 4)
748 #define OP_TLBI_VALE2 sys_insn(1, 4, 8, 7, 5)
749 #define OP_TLBI_VMALLS12E1 sys_insn(1, 4, 8, 7, 6)
773 #define OP_TLBI_RIPAS2LE1OSNXS sys_insn(1, 4, 9, 4, 7)
778 #define OP_TLBI_ALLE2NXS sys_insn(1, 4, 9, 7, 0)
779 #define OP_TLBI_VAE2NXS sys_insn(1, 4, 9, 7, 1)
780 #define OP_TLBI_ALLE1NXS sys_insn(1, 4, 9, 7, 4)
781 #define OP_TLBI_VALE2NXS sys_insn(1, 4, 9, 7, 5)
782 #define OP_TLBI_VMALLS12E1NXS sys_insn(1, 4, 9, 7, 6)
785 #define OP_GCSPUSHX sys_insn(1, 0, 7, 7, 4)
786 #define OP_GCSPOPCX sys_insn(1, 0, 7, 7, 5)
787 #define OP_GCSPOPX sys_insn(1, 0, 7, 7, 6)
788 #define OP_GCSPUSHM sys_insn(1, 3, 7, 7, 0)
790 #define OP_BRB_IALL sys_insn(1, 1, 7, 2, 4)
791 #define OP_BRB_INJ sys_insn(1, 1, 7, 2, 5)
792 #define OP_CFP_RCTX sys_insn(1, 3, 7, 3, 4)
793 #define OP_DVP_RCTX sys_insn(1, 3, 7, 3, 5)
794 #define OP_COSP_RCTX sys_insn(1, 3, 7, 3, 6)
795 #define OP_CPP_RCTX sys_insn(1, 3, 7, 3, 7)
1013 #define ICH_VMCR_BPR1_MASK (7 << ICH_VMCR_BPR1_SHIFT)
1015 #define ICH_VMCR_BPR0_MASK (7 << ICH_VMCR_BPR0_SHIFT)
1025 #define ICH_VTR_PRI_BITS_MASK (7 << ICH_VTR_PRI_BITS_SHIFT)
1027 #define ICH_VTR_ID_BITS_MASK (7 << ICH_VTR_ID_BITS_SHIFT)