Lines Matching +full:system +full:- +full:clock +full:- +full:direction +full:- +full:out

1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) Siemens AG, 2018-2021
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/net/ti-dp83867.h>
35 stdout-path = "serial3:115200n8";
38 reserved-memory {
39 #address-cells = <2>;
40 #size-cells = <2>;
43 secure_ddr: secure-ddr@9e800000 {
44 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
46 no-map;
49 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
50 compatible = "shared-dma-pool";
52 no-map;
55 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
56 compatible = "shared-dma-pool";
58 no-map;
61 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
62 compatible = "shared-dma-pool";
64 no-map;
67 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
68 compatible = "shared-dma-pool";
70 no-map;
73 rtos_ipc_memory_region: ipc-memories@a2000000 {
76 no-map;
81 compatible = "gpio-leds";
82 pinctrl-names = "default";
83 pinctrl-0 = <&leds_pins_default>;
85 status-led-red {
87 panic-indicator;
90 status-led-green {
94 user-led1-red {
98 user-led1-green {
102 user-led2-red {
106 user-led2-green {
111 dp_refclk: clock {
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 clock-frequency = <19200000>;
117 /* Dual Ethernet application node on PRU-ICSSG0 */
118 icssg0_eth: icssg0-eth {
119 compatible = "ti,am654-icssg-prueth";
120 pinctrl-names = "default";
121 pinctrl-0 = <&icssg0_rgmii_pins_default>;
126 firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
127 "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
128 "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
129 "ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
130 "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
131 "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
133 ti,pruss-gp-mux-sel = <2>, /* MII mode */
140 ti,mii-g-rt = <&icssg0_mii_g_rt>;
141 ti,mii-rt = <&icssg0_mii_rt>;
144 interrupt-parent = <&icssg0_intc>;
146 interrupt-names = "tx_ts0", "tx_ts1";
158 dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
159 "tx1-0", "tx1-1", "tx1-2", "tx1-3",
162 ethernet-ports {
163 #address-cells = <1>;
164 #size-cells = <0>;
167 phy-handle = <&icssg0_eth0_phy>;
168 phy-mode = "rgmii-id";
169 ti,syscon-rgmii-delay = <&scm_conf 0x4100>;
170 ti,half-duplex-capable;
172 local-mac-address = [00 00 00 00 00 00];
177 phy-handle = <&icssg0_eth1_phy>;
178 phy-mode = "rgmii-id";
179 ti,syscon-rgmii-delay = <&scm_conf 0x4104>;
180 ti,half-duplex-capable;
182 local-mac-address = [00 00 00 00 00 00];
189 pinctrl-names =
191 "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown",
192 "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown",
193 "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown",
194 "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown",
195 "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown",
196 "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown",
197 "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown",
198 "d13-spi0-clk", "d13-gpio", "d13-gpio-pullup", "d13-gpio-pulldown",
199 "a0-gpio", "a0-gpio-pullup", "a0-gpio-pulldown",
200 "a1-gpio", "a1-gpio-pullup", "a1-gpio-pulldown",
201 "a2-gpio", "a2-gpio-pullup", "a2-gpio-pulldown",
202 "a3-gpio", "a3-gpio-pullup", "a3-gpio-pulldown",
203 "a4-gpio", "a4-gpio-pullup", "a4-gpio-pulldown",
204 "a5-gpio", "a5-gpio-pullup", "a5-gpio-pulldown";
206 pinctrl-0 = <&d0_uart0_rxd>;
207 pinctrl-1 = <&d0_uart0_rxd>;
208 pinctrl-2 = <&d0_gpio>;
209 pinctrl-3 = <&d0_gpio_pullup>;
210 pinctrl-4 = <&d0_gpio_pulldown>;
211 pinctrl-5 = <&d1_uart0_txd>;
212 pinctrl-6 = <&d1_gpio>;
213 pinctrl-7 = <&d1_gpio_pullup>;
214 pinctrl-8 = <&d1_gpio_pulldown>;
215 pinctrl-9 = <&d2_uart0_ctsn>;
216 pinctrl-10 = <&d2_gpio>;
217 pinctrl-11 = <&d2_gpio_pullup>;
218 pinctrl-12 = <&d2_gpio_pulldown>;
219 pinctrl-13 = <&d3_uart0_rtsn>;
220 pinctrl-14 = <&d3_gpio>;
221 pinctrl-15 = <&d3_gpio_pullup>;
222 pinctrl-16 = <&d3_gpio_pulldown>;
223 pinctrl-17 = <&d10_spi0_cs0>;
224 pinctrl-18 = <&d10_gpio>;
225 pinctrl-19 = <&d10_gpio_pullup>;
226 pinctrl-20 = <&d10_gpio_pulldown>;
227 pinctrl-21 = <&d11_spi0_d0>;
228 pinctrl-22 = <&d11_gpio>;
229 pinctrl-23 = <&d11_gpio_pullup>;
230 pinctrl-24 = <&d11_gpio_pulldown>;
231 pinctrl-25 = <&d12_spi0_d1>;
232 pinctrl-26 = <&d12_gpio>;
233 pinctrl-27 = <&d12_gpio_pullup>;
234 pinctrl-28 = <&d12_gpio_pulldown>;
235 pinctrl-29 = <&d13_spi0_clk>;
236 pinctrl-30 = <&d13_gpio>;
237 pinctrl-31 = <&d13_gpio_pullup>;
238 pinctrl-32 = <&d13_gpio_pulldown>;
239 pinctrl-33 = <&a0_gpio>;
240 pinctrl-34 = <&a0_gpio_pullup>;
241 pinctrl-35 = <&a0_gpio_pulldown>;
242 pinctrl-36 = <&a1_gpio>;
243 pinctrl-37 = <&a1_gpio_pullup>;
244 pinctrl-38 = <&a1_gpio_pulldown>;
245 pinctrl-39 = <&a2_gpio>;
246 pinctrl-40 = <&a2_gpio_pullup>;
247 pinctrl-41 = <&a2_gpio_pulldown>;
248 pinctrl-42 = <&a3_gpio>;
249 pinctrl-43 = <&a3_gpio_pullup>;
250 pinctrl-44 = <&a3_gpio_pulldown>;
251 pinctrl-45 = <&a4_gpio>;
252 pinctrl-46 = <&a4_gpio_pullup>;
253 pinctrl-47 = <&a4_gpio_pulldown>;
254 pinctrl-48 = <&a5_gpio>;
255 pinctrl-49 = <&a5_gpio_pullup>;
256 pinctrl-50 = <&a5_gpio_pulldown>;
258 d0_uart0_rxd: d0-uart0-rxd-pins {
259 pinctrl-single,pins = <
265 d0_gpio: d0-gpio-pins {
266 pinctrl-single,pins = <
272 d0_gpio_pullup: d0-gpio-pullup-pins {
273 pinctrl-single,pins = <
279 d0_gpio_pulldown: d0-gpio-pulldown-pins {
280 pinctrl-single,pins = <
286 d1_uart0_txd: d1-uart0-txd-pins {
287 pinctrl-single,pins = <
293 d1_gpio: d1-gpio-pins {
294 pinctrl-single,pins = <
300 d1_gpio_pullup: d1-gpio-pullup-pins {
301 pinctrl-single,pins = <
307 d1_gpio_pulldown: d1-gpio-pulldown-pins {
308 pinctrl-single,pins = <
314 d2_uart0_ctsn: d2-uart0-ctsn-pins {
315 pinctrl-single,pins = <
321 d2_gpio: d2-gpio-pins {
322 pinctrl-single,pins = <
328 d2_gpio_pullup: d2-gpio-pullup-pins {
329 pinctrl-single,pins = <
335 d2_gpio_pulldown: d2-gpio-pulldown-pins {
336 pinctrl-single,pins = <
342 d3_uart0_rtsn: d3-uart0-rtsn-pins {
343 pinctrl-single,pins = <
349 d3_gpio: d3-gpio-pins {
350 pinctrl-single,pins = <
356 d3_gpio_pullup: d3-gpio-pullup-pins {
357 pinctrl-single,pins = <
363 d3_gpio_pulldown: d3-gpio-pulldown-pins {
364 pinctrl-single,pins = <
370 d10_spi0_cs0: d10-spi0-cs0-pins {
371 pinctrl-single,pins = <
377 d10_gpio: d10-gpio-pins {
378 pinctrl-single,pins = <
384 d10_gpio_pullup: d10-gpio-pullup-pins {
385 pinctrl-single,pins = <
391 d10_gpio_pulldown: d10-gpio-pulldown-pins {
392 pinctrl-single,pins = <
398 d11_spi0_d0: d11-spi0-d0-pins {
399 pinctrl-single,pins = <
405 d11_gpio: d11-gpio-pins {
406 pinctrl-single,pins = <
412 d11_gpio_pullup: d11-gpio-pullup-pins {
413 pinctrl-single,pins = <
419 d11_gpio_pulldown: d11-gpio-pulldown-pins {
420 pinctrl-single,pins = <
426 d12_spi0_d1: d12-spi0-d1-pins {
427 pinctrl-single,pins = <
433 d12_gpio: d12-gpio-pins {
434 pinctrl-single,pins = <
440 d12_gpio_pullup: d12-gpio-pullup-pins {
441 pinctrl-single,pins = <
447 d12_gpio_pulldown: d12-gpio-pulldown-pins {
448 pinctrl-single,pins = <
454 d13_spi0_clk: d13-spi0-clk-pins {
455 pinctrl-single,pins = <
461 d13_gpio: d13-gpio-pins {
462 pinctrl-single,pins = <
468 d13_gpio_pullup: d13-gpio-pullup-pins {
469 pinctrl-single,pins = <
475 d13_gpio_pulldown: d13-gpio-pulldown-pins {
476 pinctrl-single,pins = <
482 a0_gpio: a0-gpio-pins {
483 pinctrl-single,pins = <
489 a0_gpio_pullup: a0-gpio-pullup-pins {
490 pinctrl-single,pins = <
496 a0_gpio_pulldown: a0-gpio-pulldown-pins {
497 pinctrl-single,pins = <
503 a1_gpio: a1-gpio-pins {
504 pinctrl-single,pins = <
510 a1_gpio_pullup: a1-gpio-pullup-pins {
511 pinctrl-single,pins = <
517 a1_gpio_pulldown: a1-gpio-pulldown-pins {
518 pinctrl-single,pins = <
524 a2_gpio: a2-gpio-pins {
525 pinctrl-single,pins = <
531 a2_gpio_pullup: a2-gpio-pullup-pins {
532 pinctrl-single,pins = <
538 a2_gpio_pulldown: a2-gpio-pulldown-pins {
539 pinctrl-single,pins = <
545 a3_gpio: a3-gpio-pins {
546 pinctrl-single,pins = <
552 a3_gpio_pullup: a3-gpio-pullup-pins {
553 pinctrl-single,pins = <
559 a3_gpio_pulldown: a3-gpio-pulldown-pins {
560 pinctrl-single,pins = <
566 a4_gpio: a4-gpio-pins {
567 pinctrl-single,pins = <
573 a4_gpio_pullup: a4-gpio-pullup-pins {
574 pinctrl-single,pins = <
580 a4_gpio_pulldown: a4-gpio-pulldown-pins {
581 pinctrl-single,pins = <
587 a5_gpio: a5-gpio-pins {
588 pinctrl-single,pins = <
594 a5_gpio_pullup: a5-gpio-pullup-pins {
595 pinctrl-single,pins = <
601 a5_gpio_pulldown: a5-gpio-pulldown-pins {
602 pinctrl-single,pins = <
608 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
609 pinctrl-single,pins = <
617 mcu_i2c0_pins_default: mcu-i2c0-default-pins {
618 pinctrl-single,pins = <
626 arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-default-pins {
627 pinctrl-single,pins = <
633 push_button_pins_default: push-button-default-pins {
634 pinctrl-single,pins = <
641 arduino_io_oe_pins_default: arduino-io-oe-default-pins {
642 pinctrl-single,pins = <
656 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
657 pinctrl-single,pins = <
671 db9_com_mode_pins_default: db9-com-mode-default-pins {
672 pinctrl-single,pins = <
684 leds_pins_default: leds-default-pins {
685 pinctrl-single,pins = <
697 mcu_spi0_pins_default: mcu-spi0-default-pins {
698 pinctrl-single,pins = <
710 minipcie_pins_default: minipcie-default-pins {
711 pinctrl-single,pins = <
719 pinctrl-names =
721 "d4-ehrpwm0-a", "d4-gpio", "d4-gpio-pullup", "d4-gpio-pulldown",
722 "d5-ehrpwm1-a", "d5-gpio", "d5-gpio-pullup", "d5-gpio-pulldown",
723 "d6-ehrpwm2-a", "d6-gpio", "d6-gpio-pullup", "d6-gpio-pulldown",
724 "d7-ehrpwm3-a", "d7-gpio", "d7-gpio-pullup", "d7-gpio-pulldown",
725 "d8-ehrpwm4-a", "d8-gpio", "d8-gpio-pullup", "d8-gpio-pulldown",
726 "d9-ehrpwm5-a", "d9-gpio", "d9-gpio-pullup", "d9-gpio-pulldown";
728 pinctrl-0 = <&d4_ehrpwm0_a>;
729 pinctrl-1 = <&d4_ehrpwm0_a>;
730 pinctrl-2 = <&d4_gpio>;
731 pinctrl-3 = <&d4_gpio_pullup>;
732 pinctrl-4 = <&d4_gpio_pulldown>;
734 pinctrl-5 = <&d5_ehrpwm1_a>;
735 pinctrl-6 = <&d5_gpio>;
736 pinctrl-7 = <&d5_gpio_pullup>;
737 pinctrl-8 = <&d5_gpio_pulldown>;
739 pinctrl-9 = <&d6_ehrpwm2_a>;
740 pinctrl-10 = <&d6_gpio>;
741 pinctrl-11 = <&d6_gpio_pullup>;
742 pinctrl-12 = <&d6_gpio_pulldown>;
744 pinctrl-13 = <&d7_ehrpwm3_a>;
745 pinctrl-14 = <&d7_gpio>;
746 pinctrl-15 = <&d7_gpio_pullup>;
747 pinctrl-16 = <&d7_gpio_pulldown>;
749 pinctrl-17 = <&d8_ehrpwm4_a>;
750 pinctrl-18 = <&d8_gpio>;
751 pinctrl-19 = <&d8_gpio_pullup>;
752 pinctrl-20 = <&d8_gpio_pulldown>;
754 pinctrl-21 = <&d9_ehrpwm5_a>;
755 pinctrl-22 = <&d9_gpio>;
756 pinctrl-23 = <&d9_gpio_pullup>;
757 pinctrl-24 = <&d9_gpio_pulldown>;
759 d4_ehrpwm0_a: d4-ehrpwm0-a-pins {
760 pinctrl-single,pins = <
766 d4_gpio: d4-gpio-pins {
767 pinctrl-single,pins = <
773 d4_gpio_pullup: d4-gpio-pullup-pins {
774 pinctrl-single,pins = <
780 d4_gpio_pulldown: d4-gpio-pulldown-pins {
781 pinctrl-single,pins = <
787 d5_ehrpwm1_a: d5-ehrpwm1-a-pins {
788 pinctrl-single,pins = <
794 d5_gpio: d5-gpio-pins {
795 pinctrl-single,pins = <
801 d5_gpio_pullup: d5-gpio-pullup-pins {
802 pinctrl-single,pins = <
808 d5_gpio_pulldown: d5-gpio-pulldown-pins {
809 pinctrl-single,pins = <
815 d6_ehrpwm2_a: d6-ehrpwm2-a-pins {
816 pinctrl-single,pins = <
822 d6_gpio: d6-gpio-pins {
823 pinctrl-single,pins = <
829 d6_gpio_pullup: d6-gpio-pullup-pins {
830 pinctrl-single,pins = <
836 d6_gpio_pulldown: d6-gpio-pulldown-pins {
837 pinctrl-single,pins = <
843 d7_ehrpwm3_a: d7-ehrpwm3-a-pins {
844 pinctrl-single,pins = <
850 d7_gpio: d7-gpio-pins {
851 pinctrl-single,pins = <
857 d7_gpio_pullup: d7-gpio-pullup-pins {
858 pinctrl-single,pins = <
864 d7_gpio_pulldown: d7-gpio-pulldown-pins {
865 pinctrl-single,pins = <
871 d8_ehrpwm4_a: d8-ehrpwm4-a-pins {
872 pinctrl-single,pins = <
878 d8_gpio: d8-gpio-pins {
879 pinctrl-single,pins = <
885 d8_gpio_pullup: d8-gpio-pullup-pins {
886 pinctrl-single,pins = <
892 d8_gpio_pulldown: d8-gpio-pulldown-pins {
893 pinctrl-single,pins = <
899 d9_ehrpwm5_a: d9-ehrpwm5-a-pins {
900 pinctrl-single,pins = <
906 d9_gpio: d9-gpio-pins {
907 pinctrl-single,pins = <
913 d9_gpio_pullup: d9-gpio-pullup-pins {
914 pinctrl-single,pins = <
920 d9_gpio_pulldown: d9-gpio-pulldown-pins {
921 pinctrl-single,pins = <
927 main_pcie_enable_pins_default: main-pcie-enable-default-pins {
928 pinctrl-single,pins = <
933 main_uart1_pins_default: main-uart1-default-pins {
934 pinctrl-single,pins = <
942 main_i2c3_pins_default: main-i2c3-default-pins {
943 pinctrl-single,pins = <
949 main_mmc1_pins_default: main-mmc1-default-pins {
950 pinctrl-single,pins = <
962 usb0_pins_default: usb0-default-pins {
963 pinctrl-single,pins = <
968 usb1_pins_default: usb1-default-pins {
969 pinctrl-single,pins = <
974 dss_vout1_pins_default: dss-vout1-default-pins {
975 pinctrl-single,pins = <
1007 dp_pins_default: dp-default-pins {
1008 pinctrl-single,pins = <
1013 main_i2c2_pins_default: main-i2c2-default-pins {
1014 pinctrl-single,pins = <
1020 icssg0_mdio_pins_default: icssg0-mdio-default-pins {
1021 pinctrl-single,pins = <
1027 icssg0_rgmii_pins_default: icssg0-rgmii-default-pins {
1028 pinctrl-single,pins = <
1059 main_i2c0_pins_default: main-i2c0-default-pins {
1060 pinctrl-single,pins = <
1066 main_i2c1_pins_default: main-i2c1-default-pins {
1067 pinctrl-single,pins = <
1075 /* Wakeup UART is used by System firmware */
1081 pinctrl-names = "default";
1082 pinctrl-0 = <&main_uart1_pins_default>;
1090 gpio-line-names =
1091 "main_gpio0-base", "", "", "", "", "", "", "", "", "",
1100 pinctrl-names = "default";
1101 pinctrl-0 = <&main_pcie_enable_pins_default>;
1105 pinctrl-names = "default";
1106 pinctrl-0 =
1111 gpio-line-names =
1113 "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0",
1114 "UART0-enable", "UART0-terminate", "", "WIFI-disable",
1118 "", "A4A5-I2C-mux", "", "", "", "USER-button", "", "", "","IO0",
1120 "IO1", "IO2", "", "IO3", "IO17-direction", "A5",
1121 "IO16-direction", "IO15-direction", "IO14-direction", "A3",
1123 "", "IO18-direction", "A4", "A2", "A1", "A0", "", "", "IO13",
1131 pinctrl-names = "default";
1132 pinctrl-0 = <&wkup_i2c0_pins_default>;
1133 clock-frequency = <400000>;
1138 pinctrl-names = "default";
1139 pinctrl-0 = <&mcu_i2c0_pins_default>;
1140 clock-frequency = <400000>;
1145 regulator-name = "tps62363-vout";
1146 regulator-min-microvolt = <500000>;
1147 regulator-max-microvolt = <1500000>;
1148 regulator-boot-on;
1149 ti,vsel0-state-high;
1150 ti,vsel1-state-high;
1151 ti,enable-vout-discharge;
1158 #gpio-cells = <2>;
1159 gpio-controller;
1160 gpio-line-names =
1161 "A0-pull", "A1-pull", "A2-pull", "A3-pull", "A4-pull",
1162 "A5-pull", "", "",
1163 "IO14-enable", "IO15-enable", "IO16-enable",
1164 "IO17-enable", "IO18-enable", "IO19-enable";
1171 #gpio-cells = <2>;
1172 gpio-controller;
1173 gpio-line-names =
1174 "IO0-direction", "IO1-direction", "IO2-direction",
1175 "IO3-direction", "IO4-direction", "IO5-direction",
1176 "IO6-direction", "IO7-direction",
1177 "IO8-direction", "IO9-direction", "IO10-direction",
1178 "IO11-direction", "IO12-direction", "IO13-direction",
1179 "IO19-direction";
1186 #gpio-cells = <2>;
1187 gpio-controller;
1188 gpio-line-names =
1189 "IO0-pull", "IO1-pull", "IO2-pull", "IO3-pull",
1190 "IO4-pull", "IO5-pull", "IO6-pull", "IO7-pull",
1191 "IO8-pull", "IO9-pull", "IO10-pull", "IO11-pull",
1192 "IO12-pull", "IO13-pull";
1198 pinctrl-names = "default";
1199 pinctrl-0 = <&main_i2c0_pins_default>;
1200 clock-frequency = <400000>;
1216 pinctrl-names = "default";
1217 pinctrl-0 = <&main_i2c1_pins_default>;
1218 clock-frequency = <400000>;
1223 pinctrl-names = "default";
1224 pinctrl-0 = <&main_i2c2_pins_default>;
1225 clock-frequency = <400000>;
1230 pinctrl-names = "default";
1231 pinctrl-0 = <&main_i2c3_pins_default>;
1232 clock-frequency = <400000>;
1234 #address-cells = <1>;
1235 #size-cells = <0>;
1237 edp-bridge@f {
1240 pinctrl-names = "default";
1241 pinctrl-0 = <&dp_pins_default>;
1242 reset-gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>;
1244 clock-names = "ref";
1247 toshiba,hpd-pin = <0>;
1250 #address-cells = <1>;
1251 #size-cells = <0>;
1257 remote-endpoint = <&dpi_out>;
1270 pinctrl-names = "default";
1271 pinctrl-0 = <&main_mmc1_pins_default>;
1272 ti,driver-strength-ohm = <50>;
1273 disable-wp;
1277 pinctrl-names = "default";
1278 pinctrl-0 = <&usb0_pins_default>;
1283 pinctrl-names = "default";
1284 pinctrl-0 = <&usb1_pins_default>;
1290 #address-cells = <1>;
1291 #size-cells = <0>;
1292 ti,pindir-d0-out-d1-in;
1298 ti,adc-channels = <0 1 2 3 4 5>;
1304 pinctrl-names = "default";
1305 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
1308 compatible = "jedec,spi-nor";
1310 spi-tx-bus-width = <1>;
1311 spi-rx-bus-width = <1>;
1312 spi-max-frequency = <50000000>;
1313 cdns,tshsl-ns = <60>;
1314 cdns,tsd2d-ns = <60>;
1315 cdns,tchsh-ns = <60>;
1316 cdns,tslch-ns = <60>;
1317 cdns,read-delay = <2>;
1320 compatible = "fixed-partitions";
1321 #address-cells = <1>;
1322 #size-cells = <1>;
1334 u-boot@380000 {
1335 label = "u-boot";
1344 env-backup@6a0000 {
1359 seboot-backup@e80000 {
1368 pinctrl-names = "default";
1369 pinctrl-0 = <&dss_vout1_pins_default>;
1371 assigned-clocks = <&k3_clks 67 2>;
1372 assigned-clock-parents = <&k3_clks 67 5>;
1376 #address-cells = <1>;
1377 #size-cells = <0>;
1382 remote-endpoint = <&bridge_in>;
1389 pinctrl-names = "default";
1390 pinctrl-0 = <&minipcie_pins_default>;
1392 num-lanes = <1>;
1394 phy-names = "pcie-phy0";
1395 reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
1402 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
1403 ti,mbox-tx = <1 0 0>;
1404 ti,mbox-rx = <0 0 0>;
1412 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
1413 ti,mbox-tx = <1 0 0>;
1414 ti,mbox-rx = <0 0 0>;
1419 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
1425 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
1432 pinctrl-names = "default";
1433 pinctrl-0 = <&icssg0_mdio_pins_default>;
1435 icssg0_eth0_phy: ethernet-phy@0 {
1437 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
1438 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
1441 icssg0_eth1_phy: ethernet-phy@1 {
1443 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
1444 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;