dts/qcom/sc7280-chrome-common.dtsi

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3  * sc7280 fragment for devices with Chrome bootloader
20 /delete-node/ &cdsp_mem;
21 /delete-node/ &gpu_zap_mem;
22 /delete-node/ &gpu_zap_shader;
23 /delete-node/ &hyp_mem;
24 /delete-node/ &xbl_mem;
25 /delete-node/ &reserved_xbl_uefi_log;
26 /delete-node/ &sec_apps_mem;
29 	reserved-memory {
32 			no-map;
37 			no-map;
76 	pinctrl-names = "default", "sleep";
77 	pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>;
78 	pinctrl-1 = <&qspi_sleep>;
81 		compatible = "jedec,spi-nor";
84 		spi-max-frequency = <37500000>;
85 		spi-tx-bus-width = <2>;
86 		spi-rx-bus-width = <2>;
92 	/delete-property/ memory-region;
96 	compatible = "qcom,sc7280-wpss-pil";
101 	clock-names = "ahb_bdg",
108 	reset-names = "restart", "pdc_sync";
110 	qcom,halt-regs = <&tcsr_1 0x17000>;
112 	firmware-name = "ath11k/WCN6750/hw1.0/wpss.mdt";
118 	/* TF-A firmware maps memory cached so mark dma-coherent to match. */
119 	dma-coherent;
129 	wifi-firmware {
134 /* PINCTRL - chrome-common pinctrl */
137 	qspi_sleep: qspi-sleep-state {
145 		 * that we don't need the reverse (output-enable) in the
146 		 * normal mode since the "output-enable" only matters for
150 		output-disable;