Lines Matching +full:0 +full:x94c
26 #clock-cells = <0>;
32 #size-cells = <0>;
34 CPU0: cpu@0 {
37 reg = <0x0>;
48 reg = <0x1>;
59 reg = <0x2>;
70 reg = <0x3>;
81 reg = <0x100>;
92 reg = <0x101>;
103 reg = <0x102>;
114 reg = <0x103>;
163 little_cpu_sleep_0: cpu-sleep-0-0 {
166 arm,psci-suspend-param = <0x40000003>;
173 big_cpu_sleep_0: cpu-sleep-1-0 {
176 arm,psci-suspend-param = <0x00000002>;
185 arm,psci-suspend-param = <0x40000003>;
215 qcom,dload-mode = <&tcsr 0x6100>;
222 reg = <0x0 0x80000000 0x0 0x0>;
240 qcom,ipc = <&apcs 8 0>;
317 reg = <0x0 0x85b00000 0x0 0x500000>;
323 reg = <0x0 0x86300000 0x0 0x100000>;
331 reg = <0x0 0x86400000 0x0 0x800000>;
336 reg = <0x0 0x86c00000 0x0 0x5600000>;
341 reg = <0x0 0x8c200000 0x0 0x1000000>;
346 reg = <0x0 0x8d200000 0x0 0x800000>;
351 reg = <0x0 0x8da00000 0x0 0x2600000>;
356 reg = <0x0 0x8dd00000 0x0 0x1400000>;
366 qcom,local-pid = <0>;
389 qcom,local-pid = <0>;
412 qcom,local-pid = <0>;
434 #size-cells = <0>;
440 apps_smsm: apps@0 {
441 reg = <0>;
462 soc: soc@0 {
465 ranges = <0 0 0 0xffffffff>;
470 reg = <0x00022000 0x140>;
477 reg = <0x00060000 0x8000>;
482 reg = <0x0006c000 0x200>;
483 #phy-cells = <0>;
496 reg = <0x000a4000 0x1000>;
501 reg = <0x218 1>;
502 bits = <0 8>;
506 reg = <0x219 0x1>;
507 bits = <0 6>;
511 reg = <0x219 0x2>;
516 reg = <0x21a 0x2>;
521 reg = <0x21b 0x1>;
526 reg = <0x21c 0x1>;
527 bits = <0 6>;
531 reg = <0x21c 0x2>;
536 reg = <0x21d 0x2>;
541 reg = <0x21e 0x1>;
546 reg = <0x220 1>;
547 bits = <0 8>;
551 reg = <0x221 0x1>;
552 bits = <0 6>;
556 reg = <0x221 0x2>;
561 reg = <0x222 0x2>;
566 reg = <0x224 0x1>;
571 reg = <0x224 0x1>;
572 bits = <0 6>;
576 reg = <0x224 0x2>;
581 reg = <0x225 0x2>;
586 reg = <0x226 0x2>;
591 reg = <0x228 1>;
592 bits = <0 3>;
596 reg = <0x228 0x2>;
601 reg = <0x229 0x1>;
606 reg = <0x229 0x2>;
611 reg = <0x22a 0x2>;
616 reg = <0x22b 0x2>;
621 reg = <0x22c 0x1>;
628 reg = <0x004a9000 0x1000>, /* TM */
629 <0x004a8000 0x1000>; /* SROT */
664 reg = <0x01000000 0x300000>;
668 gpio-ranges = <&tlmm 0 0 145>;
778 reg = <0x01800000 0x80000>;
788 <0>,
789 <0>,
790 <0>,
791 <0>;
802 reg = <0x01905000 0x20000>;
808 reg = <0x01937000 0x30000>;
813 reg = <0x0200f000 0x1000>,
814 <0x02400000 0x800000>,
815 <0x02c00000 0x800000>,
816 <0x03800000 0x200000>,
817 <0x0200a000 0x2100>;
821 qcom,channel = <0>;
822 qcom,ee = <0>;
825 #size-cells = <0>;
832 reg = <0x07824900 0x500>, <0x07824000 0x800>;
848 reg = <0x07864900 0x11c>, <0x07864000 0x800>;
864 reg = <0x07884000 0x1f000>;
869 qcom,ee = <0>;
874 reg = <0x078af000 0x200>;
878 dmas = <&blsp1_dma 0>, <&blsp1_dma 1>;
885 reg = <0x078b0000 0x200>;
896 reg = <0x078b5000 0x500>;
903 pinctrl-0 = <&spi1_default>;
906 #size-cells = <0>;
912 reg = <0x078b6000 0x500>;
920 pinctrl-0 = <&blsp1_i2c2_default>;
923 #size-cells = <0>;
929 reg = <0x078b8000 0x500>;
937 pinctrl-0 = <&blsp1_i2c4_default>;
940 #size-cells = <0>;
946 reg = <0x078db000 0x200>,
947 <0x078db200 0x200>;
956 ahb-burst-config = <0>;
967 reg = <0x07a24900 0x11c>, <0x07a24000 0x800>;
984 reg = <0x07ac4000 0x1f000>;
989 qcom,ee = <0>;
994 reg = <0x07af0000 0x200>;
998 dmas = <&blsp2_dma 0>, <&blsp2_dma 1>;
1005 reg = <0x07af6000 0x600>;
1013 pinctrl-0 = <&blsp2_i2c2_default>;
1016 #size-cells = <0>;
1022 reg = <0x07af8000 0x600>;
1030 pinctrl-0 = <&blsp2_i2c4_default>;
1033 #size-cells = <0>;
1039 reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
1047 reg = <0x0b011000 0x1000>;
1053 reg = <0x0b120000 0x1000>;
1060 reg = <0x0b121000 0x1000>, <0x0b122000 0x1000>;
1063 frame-number = <0>;
1067 reg = <0x0b123000 0x1000>;
1074 reg = <0x0b124000 0x1000>;
1081 reg = <0x0b125000 0x1000>;
1088 reg = <0x0b126000 0x1000>;
1095 reg = <0x0b127000 0x1000>;
1102 reg = <0x0b128000 0x1000>;
1111 reg = <0x08600000 0x1000>;
1115 ranges = <0 0x08600000 0x1000>;
1119 reg = <0x94c 0xc8>;
1129 thermal-sensors = <&tsens 0>;