dts/freescale/fsl-lx2162a-clearfog.dts

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2023 Josua Mayer <josua@solid-run.com>
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
10 #include "fsl-lx2162a-sr-som.dtsi"
14 	compatible = "solidrun,lx2162a-clearfog", "solidrun,lx2162a-som", "fsl,lx2160a";
34 		stdout-path = "serial0:115200n8";
38 		compatible = "gpio-leds";
40 		led_sfp_at: led-sfp-at {
42 			default-state = "off";
45 		led_sfp_ab: led-sfp-ab {
47 			default-state = "off";
50 		led_sfp_bt: led-sfp-bt {
52 			default-state = "off";
55 		led_sfp_bb: led-sfp-bb {
57 			default-state = "off";
61 	sfp_at: sfp-at {
63 		i2c-bus = <&sfp_i2c0>;
64 		mod-def0-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>; /* EVT4_B */
65 		maximum-power-milliwatt = <2000>;
68 	sfp_ab: sfp-ab {
70 		i2c-bus = <&sfp_i2c1>;
71 		mod-def0-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; /* PROC_IRQ1 */
72 		maximum-power-milliwatt = <2000>;
75 	sfp_bt: sfp-bt {
77 		i2c-bus = <&sfp_i2c2>;
78 		mod-def0-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; /* PROC_IRQ10 */
79 		maximum-power-milliwatt = <2000>;
82 	sfp_bb: sfp-bb {
84 		i2c-bus = <&sfp_i2c3>;
85 		mod-def0-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; /* EVT3_B */
86 		maximum-power-milliwatt = <2000>;
92 	managed = "in-band-status";
98 	managed = "in-band-status";
104 	managed = "in-band-status";
110 	managed = "in-band-status";
116 	phy-handle = <&ethernet_phy3>;
117 	phy-connection-type = "sgmii";
123 	phy-handle = <&ethernet_phy1>;
124 	phy-connection-type = "sgmii";
130 	phy-handle = <&ethernet_phy6>;
131 	phy-connection-type = "sgmii";
137 	phy-handle = <&ethernet_phy8>;
138 	phy-connection-type = "sgmii";
144 	phy-handle = <&ethernet_phy4>;
145 	phy-connection-type = "sgmii";
151 	phy-handle = <&ethernet_phy2>;
152 	phy-connection-type = "sgmii";
157 	/* override connection to on-SoM phy */
158 	/delete-property/ phy-handle;
159 	/delete-property/ phy-connection-type;
162 	phy-handle = <&ethernet_phy5>;
163 	phy-connection-type = "sgmii";
169 	phy-handle = <&ethernet_phy7>;
170 	phy-connection-type = "sgmii";
175 	ethernet_phy1: ethernet-phy@8 {
176 		compatible = "ethernet-phy-ieee802.3-c45";
178 		max-speed = <1000>;
181 	ethernet_phy2: ethernet-phy@9 {
182 		compatible = "ethernet-phy-ieee802.3-c45";
184 		max-speed = <1000>;
187 	ethernet_phy3: ethernet-phy@10 {
188 		compatible = "ethernet-phy-ieee802.3-c45";
190 		max-speed = <1000>;
193 	ethernet_phy4: ethernet-phy@11 {
194 		compatible = "ethernet-phy-ieee802.3-c45";
196 		max-speed = <1000>;
199 	ethernet_phy5: ethernet-phy@12 {
200 		compatible = "ethernet-phy-ieee802.3-c45";
202 		max-speed = <1000>;
205 	ethernet_phy6: ethernet-phy@13 {
206 		compatible = "ethernet-phy-ieee802.3-c45";
208 		max-speed = <1000>;
211 	ethernet_phy7: ethernet-phy@14 {
212 		compatible = "ethernet-phy-ieee802.3-c45";
214 		max-speed = <1000>;
217 	ethernet_phy8: ethernet-phy@15 {
218 		compatible = "ethernet-phy-ieee802.3-c45";
220 		max-speed = <1000>;
225 	sd-uhs-sdr104;
226 	sd-uhs-sdr50;
227 	sd-uhs-sdr25;
228 	sd-uhs-sdr12;
245 	i2c-mux@70 {
248 		#address-cells = <1>;
249 		#size-cells = <0>;
250 		i2c-mux-idle-disconnect;
252 		sfp_i2c0: i2c@0 {
253 			#address-cells = <1>;
254 			#size-cells = <0>;
258 		sfp_i2c1: i2c@1 {
259 			#address-cells = <1>;
260 			#size-cells = <0>;
264 		sfp_i2c2: i2c@2 {
265 			#address-cells = <1>;
266 			#size-cells = <0>;
270 		sfp_i2c3: i2c@3 {
271 			#address-cells = <1>;
272 			#size-cells = <0>;
277 	i2c-mux@71 {
280 		#address-cells = <1>;
281 		#size-cells = <0>;
282 		i2c-mux-idle-disconnect;
284 		mpcie1_i2c: i2c@0 {
285 			#address-cells = <1>;
286 			#size-cells = <0>;
290 		mpcie0_i2c: i2c@1 {
291 			#address-cells = <1>;
292 			#size-cells = <0>;
296 		pcieclk_i2c: i2c@2 {
297 			#address-cells = <1>;
298 			#size-cells = <0>;
301 			/* clock-controller@6b */