Lines Matching +full:psci +full:- +full:0

1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/soc/samsung,exynos-usi.h>
14 #address-cells = <2>;
15 #size-cells = <1>;
17 interrupt-parent = <&gic>;
30 arm-pmu {
31 compatible = "arm,cortex-a78-pmu";
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-output-names = "oscclk";
45 clock_usi: clock-usi {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <200000000>;
49 clock-output-names = "usi";
53 #address-cells = <2>;
54 #size-cells = <0>;
56 cpu-map {
97 cpu0: cpu@0 {
99 compatible = "arm,cortex-a78ae";
100 reg = <0x0 0x0>;
101 enable-method = "psci";
106 compatible = "arm,cortex-a78ae";
107 reg = <0x0 0x100>;
108 enable-method = "psci";
113 compatible = "arm,cortex-a78ae";
114 reg = <0x0 0x200>;
115 enable-method = "psci";
120 compatible = "arm,cortex-a78ae";
121 reg = <0x0 0x300>;
122 enable-method = "psci";
127 compatible = "arm,cortex-a78ae";
128 reg = <0x0 0x10000>;
129 enable-method = "psci";
134 compatible = "arm,cortex-a78ae";
135 reg = <0x0 0x10100>;
136 enable-method = "psci";
141 compatible = "arm,cortex-a78ae";
142 reg = <0x0 0x10200>;
143 enable-method = "psci";
148 compatible = "arm,cortex-a78ae";
149 reg = <0x0 0x10300>;
150 enable-method = "psci";
155 compatible = "arm,cortex-a78ae";
156 reg = <0x0 0x20000>;
157 enable-method = "psci";
162 compatible = "arm,cortex-a78ae";
163 reg = <0x0 0x20100>;
164 enable-method = "psci";
168 psci {
169 compatible = "arm,psci-1.0";
173 soc: soc@0 {
174 compatible = "simple-bus";
175 #address-cells = <1>;
176 #size-cells = <1>;
177 ranges = <0x0 0x0 0x0 0x20000000>;
180 compatible = "samsung,exynosautov920-chipid",
181 "samsung,exynos850-chipid";
182 reg = <0x10000000 0x24>;
185 gic: interrupt-controller@10400000 {
186 compatible = "arm,gic-v3";
187 #interrupt-cells = <3>;
188 #address-cells = <0>;
189 interrupt-controller;
190 reg = <0x10400000 0x10000>,
191 <0x10460000 0x140000>;
196 compatible = "samsung,exynosautov920-peric0-sysreg",
198 reg = <0x10820000 0x2000>;
202 compatible = "samsung,exynosautov920-pinctrl";
203 reg = <0x10830000 0x10000>;
208 compatible = "samsung,exynosautov920-usi",
209 "samsung,exynos850-usi";
210 reg = <0x108800c0 0x20>;
211 samsung,sysreg = <&syscon_peric0 0x1000>;
213 #address-cells = <1>;
214 #size-cells = <1>;
217 clock-names = "pclk", "ipclk";
221 compatible = "samsung,exynosautov920-uart",
222 "samsung,exynos850-uart";
223 reg = <0x10880000 0xc0>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&uart0_bus>;
228 clock-names = "uart", "clk_uart_baud0";
229 samsung,uart-fifosize = <256>;
235 compatible = "samsung,exynosautov920-pwm",
236 "samsung,exynos4210-pwm";
237 reg = <0x109b0000 0x100>;
238 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
239 #pwm-cells = <3>;
241 clock-names = "timers";
246 compatible = "samsung,exynosautov920-peric1-sysreg",
248 reg = <0x10c20000 0x2000>;
252 compatible = "samsung,exynosautov920-pinctrl";
253 reg = <0x10c30000 0x10000>;
258 compatible = "samsung,exynosautov920-pinctrl";
259 reg = <0x11850000 0x10000>;
261 wakeup-interrupt-controller {
262 compatible = "samsung,exynosautov920-wakeup-eint";
266 pmu_system_controller: system-controller@11860000 {
267 compatible = "samsung,exynosautov920-pmu",
268 "samsung,exynos7-pmu","syscon";
269 reg = <0x11860000 0x10000>;
273 compatible = "samsung,exynosautov920-pinctrl";
274 reg = <0x16040000 0x10000>;
279 compatible = "samsung,exynosautov920-pinctrl";
280 reg = <0x16450000 0x10000>;
285 compatible = "samsung,exynosautov920-pinctrl";
286 reg = <0x16c10000 0x10000>;
291 compatible = "samsung,exynosautov920-pinctrl";
292 reg = <0x16d20000 0x10000>;
297 compatible = "samsung,exynosautov920-pinctrl";
298 reg = <0x1a460000 0x10000>;
303 compatible = "arm,armv8-timer";
312 #include "exynosautov920-pinctrl.dtsi"