Lines Matching +full:spi +full:- +full:mux
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
18 compatible = "amlogic,meson-gxl-usb-ctrl";
21 #address-cells = <2>;
22 #size-cells = <2>;
26 clock-names = "usb_ctrl", "ddr";
32 phy-names = "usb2-phy0", "usb2-phy1";
35 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
39 clock-names = "otg";
42 g-rx-fifo-size = <192>;
43 g-np-tx-fifo-size = <128>;
44 g-tx-fifo-size = <128 128 16 16 16>;
52 maximum-speed = "high-speed";
57 acodec: audio-controller@c8832000 {
60 #sound-dai-cells = <0>;
61 sound-name-prefix = "ACODEC";
63 clock-names = "pclk";
69 compatible = "amlogic,gxl-crypto";
74 clock-names = "blkmv";
81 compatible = "amlogic,aiu-gxl", "amlogic,aiu";
91 clock-names = "pclk",
105 compatible = "amlogic,meson-gxl-usb2-phy";
106 #phy-cells = <0>;
109 clock-names = "phy";
111 reset-names = "phy";
116 compatible = "amlogic,meson-gxl-usb2-phy";
117 #phy-cells = <0>;
120 clock-names = "phy";
122 reset-names = "phy";
136 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
139 #address-cells = <1>;
140 #size-cells = <0>;
141 compatible = "snps,dwmac-mdio";
147 compatible = "amlogic,meson-gxl-aobus-pinctrl";
148 #address-cells = <2>;
149 #size-cells = <2>;
156 reg-names = "mux", "pull", "gpio";
157 gpio-controller;
158 #gpio-cells = <2>;
159 gpio-ranges = <&pinctrl_aobus 0 0 14>;
163 mux {
166 bias-disable;
171 mux {
175 bias-disable;
180 mux {
183 bias-disable;
188 mux {
191 bias-disable;
196 mux {
200 bias-disable;
205 mux {
208 bias-disable;
213 mux {
217 bias-disable;
222 mux {
225 bias-disable;
230 mux {
233 bias-disable;
238 mux {
241 bias-disable;
246 mux {
249 bias-disable;
254 mux {
257 bias-disable;
262 mux {
265 bias-disable;
270 mux {
273 bias-disable;
278 mux {
281 bias-disable;
286 mux {
289 bias-disable;
294 mux {
297 bias-disable;
305 clock-names = "core";
309 compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
311 clock-names = "xtal", "mpeg-clk";
315 compatible = "amlogic,meson-gxl-gpio-intc",
316 "amlogic,meson-gpio-intc";
321 compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
325 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
329 clock-names = "isfr", "iahb", "venci";
333 clkc: clock-controller {
334 compatible = "amlogic,gxl-clkc";
335 #clock-cells = <1>;
337 clock-names = "xtal";
343 clock-names = "core";
364 compatible = "amlogic,meson-gxl-periphs-pinctrl";
365 #address-cells = <2>;
366 #size-cells = <2>;
374 reg-names = "mux", "pull", "pull-enable", "gpio";
375 gpio-controller;
376 #gpio-cells = <2>;
377 gpio-ranges = <&pinctrl_periphs 0 0 100>;
381 mux-0 {
385 bias-pull-up;
388 mux-1 {
391 bias-disable;
395 emmc_ds_pins: emmc-ds {
396 mux {
399 bias-pull-down;
404 mux {
407 bias-pull-down;
412 mux {
418 bias-disable;
422 spi_pins: spi-pins {
423 mux {
427 function = "spi";
428 bias-disable;
432 spi_idle_high_pins: spi-idle-high-pins {
433 mux {
435 bias-pull-up;
439 spi_idle_low_pins: spi-idle-low-pins {
440 mux {
442 bias-pull-down;
446 spi_ss0_pins: spi-ss0 {
447 mux {
449 function = "spi";
450 bias-disable;
455 mux-0 {
462 bias-pull-up;
465 mux-1 {
468 bias-disable;
473 mux {
476 bias-pull-down;
481 mux-0 {
488 bias-pull-up;
491 mux-1 {
494 bias-disable;
499 mux {
502 bias-pull-down;
507 mux {
510 bias-disable;
515 mux {
519 bias-disable;
524 mux {
528 bias-disable;
533 mux {
537 bias-disable;
542 mux {
546 bias-disable;
551 mux {
555 bias-disable;
560 mux {
564 bias-disable;
569 mux {
573 bias-disable;
578 mux {
582 bias-disable;
587 mux {
591 bias-disable;
596 mux {
600 bias-disable;
605 mux {
621 bias-disable;
626 mux {
629 bias-disable;
634 mux {
641 mux {
644 bias-disable;
649 mux {
652 bias-disable;
657 mux {
660 bias-disable;
665 mux {
668 bias-disable;
673 mux {
676 bias-disable;
681 mux {
684 bias-disable;
689 mux {
692 bias-disable;
697 mux {
700 bias-disable;
705 mux {
708 bias-disable;
713 mux {
716 bias-disable;
721 mux {
724 bias-disable;
729 mux {
732 bias-disable;
737 mux {
740 bias-disable;
744 mux {
747 bias-disable;
752 mux {
755 bias-disable;
760 mux {
763 bias-disable;
768 mux {
771 bias-disable;
778 compatible = "amlogic,gxl-mdio-mux";
779 #address-cells = <1>;
780 #size-cells = <0>;
782 clock-names = "ref";
783 mdio-parent-bus = <&mdio0>;
787 #address-cells = <1>;
788 #size-cells = <0>;
793 #address-cells = <1>;
794 #size-cells = <0>;
796 internal_phy: ethernet-phy@8 {
797 compatible = "ethernet-phy-id0181.4400";
800 max-speed = <100>;
819 reset-names = "viu", "venc", "vcbus", "bt656",
824 clock-names = "vpu", "vapb";
828 * free mux to safely change frequency while running.
829 * Same for VAPB but with a final gate after the glitch free mux.
831 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
833 <&clkc CLKID_VPU>, /* Glitch free mux */
836 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
837 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
843 assigned-clock-rates = <0>, /* Do Nothing */
852 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
857 clock-names = "clkin", "core", "adc_clk", "adc_sel";
864 clock-names = "core", "clkin0", "clkin1";
872 clock-names = "core", "clkin0", "clkin1";
880 clock-names = "core", "clkin0", "clkin1";
892 clock-names = "core";
894 num-cs = <1>;
903 clock-names = "xtal", "pclk", "baud";
908 clock-names = "xtal", "pclk", "baud";
913 clock-names = "xtal", "pclk", "baud";
918 clock-names = "xtal", "pclk", "baud";
923 clock-names = "xtal", "pclk", "baud";
927 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
928 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
932 compatible = "amlogic,gxl-vdec", "amlogic,gx-vdec";
937 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
939 reset-names = "esparser";