Lines Matching +full:dw +full:- +full:apb +full:- +full:timer
1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
22 compatible = "shared-dma-pool";
25 no-map;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a53";
36 enable-method = "psci";
41 compatible = "arm,cortex-a53";
43 enable-method = "psci";
48 compatible = "arm,cortex-a53";
50 enable-method = "psci";
55 compatible = "arm,cortex-a53";
57 enable-method = "psci";
64 compatible = "intel,stratix10-svc";
66 memory-region = <&service_reserved>;
68 fpga_mgr: fpga-mgr {
69 compatible = "intel,stratix10-soc-fpga-mgr";
74 fpga-region {
75 compatible = "fpga-region";
76 #address-cells = <0x2>;
77 #size-cells = <0x2>;
78 fpga-mgr = <&fpga_mgr>;
82 compatible = "arm,armv8-pmuv3";
87 interrupt-affinity = <&cpu0>,
91 interrupt-parent = <&intc>;
95 compatible = "arm,psci-0.2";
99 /* Local timer */
100 timer {
101 compatible = "arm,armv8-timer";
106 interrupt-parent = <&intc>;
109 intc: interrupt-controller@fffc1000 {
110 compatible = "arm,gic-400", "arm,cortex-a15-gic";
111 #interrupt-cells = <3>;
112 interrupt-controller;
120 cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
121 #clock-cells = <0>;
122 compatible = "fixed-clock";
125 cb_intosc_ls_clk: cb-intosc-ls-clk {
126 #clock-cells = <0>;
127 compatible = "fixed-clock";
130 f2s_free_clk: f2s-free-clk {
131 #clock-cells = <0>;
132 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 compatible = "fixed-clock";
140 qspi_clk: qspi-clk {
141 #clock-cells = <0>;
142 compatible = "fixed-clock";
143 clock-frequency = <200000000>;
148 #address-cells = <1>;
149 #size-cells = <1>;
150 compatible = "simple-bus";
152 interrupt-parent = <&intc>;
155 clkmgr: clock-controller@ffd10000 {
156 compatible = "intel,stratix10-clkmgr";
158 #clock-cells = <1>;
162 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
165 interrupt-names = "macirq";
166 mac-address = [00 00 00 00 00 00];
168 reset-names = "stmmaceth", "ahb";
170 clock-names = "stmmaceth", "ptp_ref";
171 tx-fifo-depth = <16384>;
172 rx-fifo-depth = <16384>;
173 snps,multicast-filter-bins = <256>;
175 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
180 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
183 interrupt-names = "macirq";
184 mac-address = [00 00 00 00 00 00];
186 reset-names = "stmmaceth", "ahb";
188 clock-names = "stmmaceth", "ptp_ref";
189 tx-fifo-depth = <16384>;
190 rx-fifo-depth = <16384>;
191 snps,multicast-filter-bins = <256>;
193 altr,sysmgr-syscon = <&sysmgr 0x48 8>;
198 compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac";
201 interrupt-names = "macirq";
202 mac-address = [00 00 00 00 00 00];
204 reset-names = "stmmaceth", "ahb";
206 clock-names = "stmmaceth", "ptp_ref";
207 tx-fifo-depth = <16384>;
208 rx-fifo-depth = <16384>;
209 snps,multicast-filter-bins = <256>;
211 altr,sysmgr-syscon = <&sysmgr 0x4c 16>;
216 #address-cells = <1>;
217 #size-cells = <0>;
218 compatible = "snps,dw-apb-gpio";
223 porta: gpio-controller@0 {
224 compatible = "snps,dw-apb-gpio-port";
225 gpio-controller;
226 #gpio-cells = <2>;
229 interrupt-controller;
230 #interrupt-cells = <2>;
236 #address-cells = <1>;
237 #size-cells = <0>;
238 compatible = "snps,dw-apb-gpio";
243 portb: gpio-controller@0 {
244 compatible = "snps,dw-apb-gpio-port";
245 gpio-controller;
246 #gpio-cells = <2>;
249 interrupt-controller;
250 #interrupt-cells = <2>;
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "snps,designware-i2c";
267 #address-cells = <1>;
268 #size-cells = <0>;
269 compatible = "snps,designware-i2c";
278 #address-cells = <1>;
279 #size-cells = <0>;
280 compatible = "snps,designware-i2c";
289 #address-cells = <1>;
290 #size-cells = <0>;
291 compatible = "snps,designware-i2c";
300 #address-cells = <1>;
301 #size-cells = <0>;
302 compatible = "snps,designware-i2c";
311 #address-cells = <1>;
312 #size-cells = <0>;
313 compatible = "altr,socfpga-dw-mshc";
316 fifo-depth = <0x400>;
318 reset-names = "reset";
321 clock-names = "biu", "ciu";
323 altr,sysmgr-syscon = <&sysmgr 0x28 4>;
327 nand: nand-controller@ffb90000 {
328 #address-cells = <1>;
329 #size-cells = <0>;
330 compatible = "altr,socfpga-denali-nand";
333 reg-names = "nand_data", "denali_reg";
338 clock-names = "nand", "nand_x", "ecc";
344 compatible = "mmio-sram";
346 #address-cells = <1>;
347 #size-cells = <1>;
351 pdma: dma-controller@ffda0000 {
363 #dma-cells = <1>;
365 clock-names = "apb_pclk";
367 reset-names = "dma", "dma-ocp";
371 compatible = "pinctrl-single";
373 #pinctrl-cells = <1>;
374 pinctrl-single,register-width = <32>;
375 pinctrl-single,function-mask = <0x0000000f>;
379 compatible = "pinctrl-single";
381 #pinctrl-cells = <1>;
382 pinctrl-single,register-width = <32>;
383 pinctrl-single,function-mask = <0x0000000f>;
387 #reset-cells = <1>;
388 compatible = "altr,stratix10-rst-mgr";
393 compatible = "arm,mmu-500", "arm,smmu-v2";
395 #global-interrupts = <2>;
396 #iommu-cells = <1>;
398 clock-names = "iommu";
399 interrupt-parent = <&intc>;
401 <0 129 4>, /* Global Non-secure Fault */
402 /* Non-secure Context Interrupts (32) */
411 stream-match-mask = <0x7ff0>;
416 compatible = "snps,dw-apb-ssi";
417 #address-cells = <1>;
418 #size-cells = <0>;
422 reset-names = "spi";
423 reg-io-width = <4>;
424 num-cs = <4>;
430 compatible = "snps,dw-apb-ssi";
431 #address-cells = <1>;
432 #size-cells = <0>;
436 reset-names = "spi";
437 reg-io-width = <4>;
438 num-cs = <4>;
444 compatible = "altr,sys-mgr-s10","altr,sys-mgr";
449 compatible = "snps,dw-apb-timer";
453 clock-names = "timer";
457 compatible = "snps,dw-apb-timer";
461 clock-names = "timer";
465 compatible = "snps,dw-apb-timer";
469 clock-names = "timer";
473 compatible = "snps,dw-apb-timer";
477 clock-names = "timer";
481 compatible = "snps,dw-apb-uart";
484 reg-shift = <2>;
485 reg-io-width = <4>;
492 compatible = "snps,dw-apb-uart";
495 reg-shift = <2>;
496 reg-io-width = <4>;
507 phy-names = "usb2-phy";
509 reset-names = "dwc2", "dwc2-ecc";
511 clock-names = "otg";
521 phy-names = "usb2-phy";
523 reset-names = "dwc2", "dwc2-ecc";
525 clock-names = "otg";
531 compatible = "snps,dw-wdt";
540 compatible = "snps,dw-wdt";
549 compatible = "snps,dw-wdt";
558 compatible = "snps,dw-wdt";
567 compatible = "altr,sdr-ctl", "syscon";
572 compatible = "altr,socfpga-s10-ecc-manager",
573 "altr,socfpga-a10-ecc-manager";
574 altr,sysmgr-syscon = <&sysmgr>;
575 #address-cells = <1>;
576 #size-cells = <1>;
578 interrupt-controller;
579 #interrupt-cells = <2>;
583 compatible = "altr,sdram-edac-s10";
584 altr,sdr-syscon = <&sdr>;
588 ocram-ecc@ff8cc000 {
589 compatible = "altr,socfpga-s10-ocram-ecc",
590 "altr,socfpga-a10-ocram-ecc";
592 altr,ecc-parent = <&ocram>;
596 usb0-ecc@ff8c4000 {
597 compatible = "altr,socfpga-s10-usb-ecc",
598 "altr,socfpga-usb-ecc";
600 altr,ecc-parent = <&usb0>;
604 emac0-rx-ecc@ff8c0000 {
605 compatible = "altr,socfpga-s10-eth-mac-ecc",
606 "altr,socfpga-eth-mac-ecc";
608 altr,ecc-parent = <&gmac0>;
612 emac0-tx-ecc@ff8c0400 {
613 compatible = "altr,socfpga-s10-eth-mac-ecc",
614 "altr,socfpga-eth-mac-ecc";
616 altr,ecc-parent = <&gmac0>;
623 compatible = "intel,socfpga-qspi", "cdns,qspi-nor";
624 #address-cells = <1>;
625 #size-cells = <0>;
629 cdns,fifo-depth = <128>;
630 cdns,fifo-width = <4>;
631 cdns,trigger-address = <0x00000000>;
639 compatible = "usb-nop-xceiv";
640 #phy-cells = <0>;