arm/mm/tlb-v7.S

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  linux/arch/arm/mm/tlb-v7.S
5  *  Copyright (C) 1997-2002 Russell King
8  *  ARM architecture version 6 TLB handling functions.
9  *  These assume a split I/D TLB.
14 #include <asm/asm-offsets.h>
17 #include "proc-macros.S"
19 .arch armv7-a
24  *	Invalidate a range of TLB entries in the specified address space.
26  *	- start - start address (may not be aligned)
27  *	- end   - end address (exclusive, may not be aligned)
28  *	- vma   - vm_area_struct describing address range
31  *	- the "Invalidate single entry" instruction will invalidate
32  *	  both the I and the D TLBs on Harvard-style TLBs
35 	vma_vm_mm r3, r2			@ get vma->vm_mm
36 	mmid	r3, r3				@ get vm_mm->context.id
49 	ALT_SMP(mcr	p15, 0, r0, c8, c3, 3)	@ TLB invalidate U MVA all ASID (shareable)
51 	ALT_SMP(mcr	p15, 0, r0, c8, c3, 1)	@ TLB invalidate U MVA (shareable)
53 	ALT_UP(mcr	p15, 0, r0, c8, c7, 1)	@ TLB invalidate U MVA
65  *	Invalidate a range of kernel TLB entries
67  *	- start - start address (may not be aligned)
68  *	- end   - end address (exclusive, may not be aligned)
78 	ALT_SMP(mcr	p15, 0, r0, c8, c3, 3)	@ TLB invalidate U MVA all ASID (shareable)
80 	ALT_SMP(mcr	p15, 0, r0, c8, c3, 1)	@ TLB invalidate U MVA (shareable)
82 	ALT_UP(mcr	p15, 0, r0, c8, c7, 1)	@ TLB invalidate U MVA
93 	/* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */