arm/mm/tlb-v6.S

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  linux/arch/arm/mm/tlb-v6.S
5  *  Copyright (C) 1997-2002 Russell King
7  *  ARM architecture version 6 TLB handling functions.
8  *  These assume a split I/D TLB.
12 #include <asm/asm-offsets.h>
16 #include "proc-macros.S"
25  *	Invalidate a range of TLB entries in the specified address space.
27  *	- start - start address (may not be aligned)
28  *	- end   - end address (exclusive, may not be aligned)
29  *	- vma   - vm_area_struct describing address range
32  *	- the "Invalidate single entry" instruction will invalidate
33  *	  both the I and the D TLBs on Harvard-style TLBs
36 	vma_vm_mm r3, r2			@ get vma->vm_mm
38 	mmid	r3, r3				@ get vm_mm->context.id
45 	vma_vm_flags r2, r2			@ get vma->vm_flags
48 	mcr	p15, 0, r0, c8, c6, 1		@ TLB invalidate D MVA (was 1)
50 	mcrne	p15, 0, r0, c8, c5, 1		@ TLB invalidate I MVA (was 1)
52 	mcr	p15, 0, r0, c8, c7, 1		@ TLB invalidate MVA (was 1)
63  *	Invalidate a range of kernel TLB entries
65  *	- start - start address (may not be aligned)
66  *	- end   - end address (exclusive, may not be aligned)
77 	mcr	p15, 0, r0, c8, c6, 1		@ TLB invalidate D MVA
78 	mcr	p15, 0, r0, c8, c5, 1		@ TLB invalidate I MVA
80 	mcr	p15, 0, r0, c8, c7, 1		@ TLB invalidate MVA
91 	/* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */